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Texas Instruments
Texas Instruments

CD4049 Datasheet

CMOS HEX BUFFERS/CONVERTERS


CD4049 Datasheet Preview


Data sheet acquired from Harris Semiconductor
SCHS046A
CMOS Hex Buffer/Converters
[ /Title
(CD40
49UB,
CD405
0B)
/Sub-
ject
(CMO
S Hex
Buffer /
Con-
verters)
/Autho
r ()
/Key-
words
(Harris
Semi-
con-
ductor,
CD400
0,
metal
gate,
CMOS
The CD4049UB and CD4050B devices are inverting and
non-inverting hex buffers, respectively, and feature logic-
level conversion using only one supply voltage (VCC). The
input-signal high level (VIH) can exceed the VCC supply
voltage when these devices are used for logic-level
conversions. These devices are intended for use as CMOS
to DTL/TTL converters and can drive directly two DTL/TTL
loads. (VCC = 5V, VOL 0.4V, and IOL 3.3mA.)
The CD4049UB and CD4050B are designated as
replacements for CD4009UB and CD4010B, respectively.
Because the CD4049UB and CD4050B require only one
power supply, they are preferred over the CD4009UB and
CD4010B and should be used in place of the CD4009UB
and CD4010B in all inverter, current driver, or logic-level
conversion applications. In these applications the
CD4049UB and CD4050B are pin compatible with the
CD4009UB and CD4010B respectively, and can be
substituted for these devices in existing as well as in new
designs. Terminal No. 16 is not connected internally on the
CD4049UB or CD4050B, therefore, connection to this
terminal is of no consequence to circuit operation. For
applications not requiring high sink-current or voltage
conversion, the CD4069UB Hex Inverter is recommended.
Pinouts
CD4049UB (PDIP, CERDIP)
TOP VIEW
VCC 1
G=A 2
A3
H=B 4
B5
I=C 6
C7
VSS 8
16 NC
15 L = F
14 F
13 NC
12 K = E
11 E
10 J = D
9D
CD4049UB, CD4050B
August 1998 - Revised May 1999
Features
• CD4049UB Inverting
• CD4050B Non-Inverting
• High Sink Current for Driving 2 TTL Loads
• High-To-Low Level Logic Conversion
• 100% Tested for Quiescent Current at 20V
• Maximum Input Current of 1µA at 18V Over Full Package
Temperature Range; 100nA at 18V and 25oC
• 5V, 10V and 15V Parametric Ratings
Applications
• CMOS to DTL/TTL Hex Converter
• CMOS Current “Sink” or “Source” Driver
• CMOS High-To-Low Logic Level Converter
Ordering Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
PKG.
NO.
CD4049UBE
-55 to 125 16 Ld PDIP
E16.3
CD4050BE
-55 to 125 16 Ld PDIP
E16.3
CD4049UBF
-55 to 125 16 Ld CERDIP F16.3
CD4050BF
-55 to 125 16 Ld CERDIP F16.3
CD4050BM
-55 to 125 16 Ld SOIC
M16.3
NOTE: Wafer and die for this part number is available which meets
all electrical specifications. Please contact your local sales office or
customer service for ordering information.
CD4050B (PDIP, CERDIP, SOIC)
TOP VIEW
VCC 1
G=A 2
A3
H=B 4
B5
I=C 6
C7
VSS 8
16 NC
15 L = F
14 F
13 NC
12 K = E
11 E
10 J = D
9D
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Copyright © 1999, Texas Instruments Incorporated
Page 1

Functional Block Diagrams
CD4049UB
3
A
5
B
7
C
9
D
11
E
14
F
VCC
VSS
1
8
NC = 13
NC = 16
2
G=A
4
H=B
6
I=C
10
J=D
12
K=E
15
L=F
CD4049UB, CD4050B
CD4050B
3
A
5
B
7
C
9
D
11
E
14
F
VCC
VSS
1
8
NC = 13
NC = 16
2
G=A
4
H=B
6
I=C
10
J=D
12
K=E
15
L=F
Schematic Diagrams
VCC
VCC
R
IN
P
OUT
N
VSS
FIGURE 1A. SCHEMATIC DIAGRAM OF CD4049UB, 1 OF 6
IDENTICAL UNITS
R
IN
PP
OUT
NN
VSS
FIGURE 1B. SCHEMATIC DIAGRAM OF CD4050B, 1 OF 6
IDENTICAL UNITS
2
Page 2

CD4049UB, CD4050B
Absolute Maximum Ratings
Supply Voltage (V+ to V-). . . . . . . . . . . . . . . . . . . . . . . -0.5V to 20V
DC Input Current, Any One Input. . . . . . . . . . . . . . . . . . . . . . ±10mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W) θJC (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . .
90
N/A
CERDIP Package. . . . . . . . . . . . . . . . . 130
55
SOIC Package . . . . . . . . . . . . . . . . . . . 100
N/A
Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .265oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
DC Electrical Specifications
PARAMETER
Quiescent Device Current
IDD (Max)
Output Low (Sink) Current
IOL (Min)
TEST CONDITIONS
VO VIN
(V) (V) VCC (V)
- 0,5 5
- 0,10 10
- 0,15 15
- 0,20 20
0.4 0,5 4.5
0.4 0,5
5
0.5 0,10 10
1.5 0,15 15
LIMITS AT INDICATED TEMPERATURE (oC)
25
-55 -40 85 125 MIN TYP MAX
1 1 30 30 - 0.02 1
2 2 60 60 - 0.02 2
4 4 120 120 - 0.02 4
20 20 600 600 - 0.04 20
3.3 3.1 2.1 1.8 2.6 5.2
-
4 3.8 2.9 2.4 3.2 6.4 -
10 9.6 6.6 5.6
8
16
-
26 25 20 18 24 48
-
UNITS
µA
µA
µA
µA
mA
mA
mA
mA
Output High (Source) Current
IOH (Min)
4.6 0,5
5 -0.81 -0.73 -0.58 -0.48 -0.65 -1.2 -
2.5 0,5
5
-2.6 -2.4 -1.9 -1.55 -2.1 -3.9
-
9.5 0,10 10 -2.0 -1.8 -1.35 -1.18 -1.65 -3.0 -
mA
mA
mA
Out Voltage Low Level
VOL (Max)
13.5 0,15
- 0,5
- 0,10
- 0,15
15 -5.2 -4.8 -3.5 -3.1 -4.3 -8.0 -
mA
5
0.05 0.05 0.05 0.05
-
0 0.05
V
10 0.05 0.05 0.05 0.05 -
0 0.05
V
5
0.05 0.05 0.05 0.05
-
0 0.05
V
Output Voltage High Level
VOH (Min)
-
0,5
5
4.95 4.95 4.95 4.95 4.95
5
-
- 0,10 10 9.95 9.95 9.95 9.95 9.95 10 -
- 0,15 15 14.95 14.95 14.95 14.95 14.95 15 -
V
V
V
Input Low Voltage, VIL (Max)
CD4049UB
Input Low Voltage, VIL (Max)
CD4050B
Input High Voltage, VIH Min
CD4049UB
4.5 -
9-
13.5 -
0.5 -
1-
1.5 -
0.5 -
1-
1.5 -
5 1111 - -
10 2 2 2 2 - -
15 2.5 2.5 2.5 2.5 -
-
5
1.5 1.5 1.5 1.5
-
-
10 3 3 3 3 - -
15 4 4 4 4 - -
5 44444 -
10 8 8 8 8 8 -
15 12.5 12.5 12.5 12.5 12.5 -
1
2
2.5
1.5
3
4
-
-
-
V
V
V
V
V
V
V
V
V
3
Page 3
Part Number CD4049
Manufactur Texas Instruments
Description CMOS HEX BUFFERS/CONVERTERS
Total Page 11 Pages
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