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Fairchild Semiconductor
Fairchild Semiconductor

CD4030CN Datasheet

Quad EXCLUSIVE-OR Gate


CD4030CN Datasheet Preview


October 1987
Revised January 1999
CD4030C
Quad EXCLUSIVE-OR Gate
General Description
The CD4030C EXCLUSIVE-OR gates are monolithic com-
plementary MOS (CMOS) integrated circuits constructed
with N- and P-channel enhancement mode transistors. All
inputs are protected against static discharge with diodes to
VDD and VSS.
Features
s Wide supply voltage range:
s Low power: 100 nW (typ.)
s Medium speed operation:
3.0V to 15V
tPHL = tPLH = 40 ns (typ.) at CL = 15 pF, 10V supply
s High noise immunity 0.45 VCC (typ.)
Applications
• Automotive
• Data terminals
• Instrumentation
• Medical electronics
• Industrial controls
• Remote metering
• Computers
Ordering Code:
Order Number Package Number
Package Description
CD4030CSJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
CD4030CN
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Truth Table
Pin Assignments for DIP and SOP
AB J
000
101
011
110
1 = HIGH Level
0 = LOW Level
© 1999 Fairchild Semiconductor Corporation DS005961.prf
www.fairchildsemi.com
Page 1

Logic Diagram
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2
Page 2

Absolute Maximum Ratings(Note 1)
Voltage at Any Pin (Note 2)
Operating Temperature Range
Storage Temperature Range
Power Dissipation (PD)
Dual-In-Line
Small Outline
Operating VDD Range
VSS 0.3V to VSS +15.5V
40°C to +85°C
65°C to +150°C
700 mW
500 mW
VSS +3.0V to VSS +15V
Lead Temperature
(Soldering, 10 seconds)
260°C
Note 1: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. Except for “Operating Tempera-
ture Range” they are not meant to imply that the devices should be oper-
ated at these limits. The Electrical Characteristics tables provide conditions
for actual device operation.
Note 2: This device should not be connected to circuits with power on
because high transient voltages may cause permanent damage.
DC Electrical Characteristics
Symbol
Parameter
Conditions
IL
Quiescent Device
VDD = 5.0V
Current
VDD = 10V
PD
Quiescent Device
VDD = 5.0V
Dissipation Package
VDD = 10V
VOL Output Voltage
VDD = 5.0V
LOW Level
VDD = 10V
VOH Output Voltage
VDD = 5.0V
HIGH Level
VDD = 10V
VNL Noise Immunity
VDD = 5.0V
(All Inputs)
VDD = 10V
VNH Noise Immunity
VDD = 5.0V
(All Inputs)
VDD = 10V
IDN
Output Drive Current
VDD = 5.0V
N-Channel (Note 3)
VDD = 10V
IDP
Output Drive Current
VDD = 5.0V
P-Channel (Note 3)
VDD = 10 V
II Input Current
VI = 0V or VI = VDD
Note 3: IDN and IDP are tested one output at a time.
Min
4.95
9.95
1.5
3.0
1.4
2.9
0.35
0.7
0.21
0.45
40°C
Typ
Max
5.0
10
25
100
0.05
0.05
Limits
+25°C
Min Typ
0.05
0.1
0.25
1.0
0
0
4.95 5.0
9.95 10
1.5 2.25
3.0 4.5
1.5 2.25
3.0 4.5
0.3 1.2
0.6 2.4
0.15 0.6
0.32 1.3
10
Max
5.0
10
25
100
0.05
0.05
+85°C
Min Typ
4.95
9.95
1.4
2.9
1.5
3.0
0.25
0.5
0.12
0.25
Max
70
140
350
1,400
0.05
0.05
Units
µA
µA
µW
µW
V
V
V
V
V
V
V
V
mA
mA
mA
mA
pA
AC Electrical Characteristics (Note 4)
Symbol
Parameter
Conditions
tPHL
Propagation Delay Time
VDD = 5.0V
VDD = 10V
tPLH
Propagation Delay Time
VDD = 5.0V
VDD = 10V
tTHL Transition Time
VDD = 5.0V
HIGH-to-LOW Level
VDD = 10V
tTLH Transition Time
VDD = 5.0V
LOW-to-HIGH Level
VDD = 10V
CI Input Capacitance
VI = 0V or VI = VDD
Note 4: AC Parameters are guaranteed by DC correlated testing.
Limits
Min Typ Max
100 300
40 150
100 300
40 150
70 300
25 150
80 300
30 150
5.0
Units
ns
ns
ns
ns
ns
ns
ns
ns
pF
3 www.fairchildsemi.com
Page 3

Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
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4
Page 4
Part Number CD4030CN
Manufactur Fairchild Semiconductor
Description Quad EXCLUSIVE-OR Gate
Total Page 5 Pages
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