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Fairchild Semiconductor
Fairchild Semiconductor

74LS47 Datasheet

BCD to 7-Segment Decoder/Driver with Open-Collector Outputs


74LS47 Datasheet Preview


October 1988
Revised March 2000
DM74LS47
BCD to 7-Segment Decoder/Driver with
Open-Collector Outputs
General Description
The DM74LS47 accepts four lines of BCD (8421) input
data, generates their complements internally and decodes
the data with seven AND/OR gates having open-collector
outputs to drive indicator segments directly. Each segment
output is guaranteed to sink 24 mA in the ON (LOW) state
and withstand 15V in the OFF (HIGH) state with a maxi-
mum leakage current of 250 µA. Auxiliary inputs provided
blanking, lamp test and cascadable zero-suppression func-
tions.
Features
s Open-collector outputs
s Drive indicator segments directly
s Cascadable zero-suppression capability
s Lamp test input
Ordering Code:
Order Number Package Number
Package Description
DM74LS47M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74LS47N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
VCC = Pin 16
GND = Pin 8
Pin Descriptions
Pin Names
Description
A0–A3
BCD Inputs
RBI Ripple Blanking Input (Active LOW)
LT Lamp Test Input (Active LOW)
BI/RBO
Blanking Input (Active LOW) or
Ripple Blanking Output (Active LOW)
a –g Segment Outputs (Active LOW) (Note 1)
Note 1: OC—Open Collector
© 2000 Fairchild Semiconductor Corporation DS009817
www.fairchildsemi.com
Page 1

Truth Table
Decimal
or
Inputs
Outputs
Note
Function LT RBI A3 A2 A1 A0 BI/RBO a b c d e f g
0 H H L L L L H L L L L L L H (Note 2)
1 H X L L L H H H L L H H H H (Note 2)
2 HX L L H L H L LHL LHL
3 H X L L H H H L L L LHHL
4
HXLHL L
H HL LHHL L
5 HX L H L H H LHLLHLL
6
HX LHHL
H HHL L L L L
7 H X L H H H H L L LHHHH
8 HXHL L L H LLLLLLL
9 H X H L L H H L L LHHL L
10
HXHLHL
H HHHL LHL
11 H X H L H H H H H L L H H L
12
HXHHL L
H H LHHHL L
13 H X H H L H H L H H L H L L
14
HXHHHL
H HHHL L L L
15 H X H H H H H H H H H H H H
BI X X X X X X L H H H H H H H (Note 3)
RBI H L L L L L L H H H H H H H (Note 4)
LT L X X X X X H L L L L L L L (Note 5)
Note 2: BI/RBO is wire-AND logic serving as blanking input (BI) and/or ripple-blanking output (RBO). The blanking out (BI) must be open or held at a HIGH
level when output functions 0 through 15 are desired, and ripple-blanking input (RBI) must be open or at a HIGH level if blanking or a decimal 0 is not
desired. X = input may be HIGH or LOW.
Note 3: When a LOW level is applied to the blanking input (forced condition) all segment outputs go to a HIGH level regardless of the state of any other input
condition.
Note 4: When ripple-blanking input (RBI) and inputs A0, A1, A2 and A3 are LOW level, with the lamp test input at HIGH level, all segment outputs go to a
HIGH level and the ripple-blanking output (RBO) goes to a LOW level (response condition).
Note 5: When the blanking input/ripple-blanking output (BI/RBO) is OPEN or held at a HIGH level, and a LOW level is applied to lamp test input, all segment
outputs go to a LOW level.
Functional Description
The DM74LS47 decodes the input data in the pattern indi-
cated in the Truth Table and the segment identification
illustration. If the input data is decimal zero, a LOW signal
applied to the RBI blanks the display and causes a multi-
digit display. For example, by grounding the RBI of the
highest order decoder and connecting its BI/RBO to RBI of
the next lowest order decoder, etc., leading zeros will be
suppressed. Similarly, by grounding RBI of the lowest order
decoder and connecting its BI/RBO to RBI of the next high-
est order decoder, etc., trailing zeros will be suppressed.
Leading and trailing zeros can be suppressed simulta-
neously by using external gates, i.e.: by driving RBI of a
intermediate decoder from an OR gate whose inputs are
BI/RBO of the next highest and lowest order decoders. BI/
RBO also serves as an unconditional blanking input. The
internal NAND gate that generates the RBO signal has a
resistive pull-up, as opposed to a totem pole, and thus BI/
RBO can be forced LOW by external means, using wired-
collector logic. A LOW signal thus applied to BI/RBO turns
off all segment outputs. This blanking feature can be used
to control display intensity by varying the duty cycle of the
blanking signal. A LOW signal applied to LT turns on all
segment outputs, provided that BI/RBO is not forced LOW.
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Page 2

Logic Diagram
Numerical Designations—Resultant Displays
3 www.fairchildsemi.com
Page 3

Absolute Maximum Ratings(Note 6)
Supply Voltage
7V
Input Voltage
7V
Operating Free Air Temperature Range 0°C to +70°C
Storage Temperature Range
65°C to +150°C
Note 6: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Symbol
Parameter
VCC Supply Voltage
VIH HIGH Level Input Voltage
VIL LOW Level Input Voltage
IOH HIGH Level Output Current
a g @ 15V = VOH (Note 7)
IOH HIGH Level Output Current BI /RBO
IOL LOW Level Output Current
TA Free Air Operating Temperature
Note 7: OFF-State at a–g.
Min
4.75
2
0
Nom
5
Max
5.25
0.8
250
50
24
70
Units
V
V
V
µA
µA
mA
°C
Electrical Characteristics
Over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
Min
VI Input Clamp Voltage
VCC = Min, II = −18 mA
VOH HIGH Level
Output Voltage
VCC = Min, IOH = Max,
VIL = Max, BI /RBO
2.7
IOFF Output HIGH Current Segment Outputs VCC = 5.5V, VO = 15V a g
VOL LOW Level
VCC = Min, IOL = Max,
Output Voltage
VIH = Min, a g
IOL = 3.2 mA, BI /RBO
IOL = 12 mA, a –g
IOL = 1.6 mA, BI /RBO
II Input Current @ Max
VCC = Max, VI = 7V
Input Voltage
VCC = Max, VI = 10V
IIH HIGH Level Input Current
VCC = Max, VI = 2.7V
IIL LOW Level Input Current
VCC = Max, VI = 0.4V
IOS Short Circuit
VCC = Max (Note 9),
Output Current
IOS at BI/RBO
0.3
ICC Supply Current
VCC = Max
Note 8: All typicals are at VCC = 5V, TA = 25°C.
Note 9: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Typ
(Note 8)
3.4
0.35
0.25
Max
1.5
250
0.5
0.5
0.4
0.4
100
20
0.4
2.0
13
Units
V
V
µA
V
µA
µA
mA
mA
mA
Switching Characteristics
at VCC = +5.0V, TA = +25°C
Symbol
Parameter
tPLH Propagation Delay
tPHL An to a –g
tPLH Propagation Delay
tPHL RBI to a –g (Note 10)
Note 10: LT = HIGH, A0–A3 = LOW
Conditions
RL = 665
CL = 15 pF
Min Max
100
100
100
100
Units
ns
ns
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4
Page 4
Part Number 74LS47
Manufactur Fairchild Semiconductor
Description BCD to 7-Segment Decoder/Driver with Open-Collector Outputs
Total Page 6 Pages
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