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ON Semiconductor
ON Semiconductor

74LS164 Datasheet

LOW POWER SCHOTTKY


74LS164 Datasheet Preview


SN74LS164
Serial-In Parallel-Out
Shift Register
The SN74LS164 is a high speed 8-Bit Serial-In Parallel-Out Shift
Register. Serial data is entered through a 2-Input AND gate
synchronous with the LOW to HIGH transition of the clock. The
device features an asynchronous Master Reset which clears the
register setting all outputs LOW independent of the clock. It utilizes
the Schottky diode clamped process to achieve high speeds and is fully
compatible with all ON Semiconductor TTL products.
Typical Shift Frequency of 35 MHz
Asynchronous Master Reset
Gated Serial Data Input
Fully Synchronous Data Transfers
Input Clamp Diodes Limit High Speed Termination Effects
ESD > 3500 Volts
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min Typ Max Unit
VCC Supply Voltage
TA Operating Ambient
Temperature Range
4.75 5.0 5.25
V
0 25 70 °C
IOH Output Current – High
IOL Output Current – Low
– 0.4
8.0
mA
mA
http://onsemi.com
LOW
POWER
SCHOTTKY
14
1
PLASTIC
N SUFFIX
CASE 646
14
1
SOIC
D SUFFIX
CASE 751A
ORDERING INFORMATION
Device
Package
Shipping
SN74LS164N 14 Pin DIP 2000 Units/Box
SN74LS164D
14 Pin
2500/Tape & Reel
© Semiconductor Components Industries, LLC, 1999
December, 1999 – Rev. 6
1
Publication Order Number:
SN74LS164/D
Page 1

SN74LS164
CONNECTION DIAGRAM DIP (TOP VIEW)
VCC Q7 Q6 Q5 Q4 MR CP
14 13 12 11 10 9 8
NOTE:
The Flatpak version has the same
pinouts (Connection Diagram) as
the Dual In-Line Package.
1234567
A B Q0 Q1 Q2 Q3 GND
PIN NAMES
A, B
CP
MR
Q0 – Q7
Data Inputs
Clock (Active HIGH Going Edge) Input
Master Reset (Active LOW) Input
Outputs
NOTES:
a) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW.
LOADING (Note a)
HIGH
LOW
0.5 U.L.
0.5 U.L.
0.5 U.L.
10 U.L.
0.25 U.L.
0.25 U.L.
0.25 U.L.
5 U.L.
LOGIC SYMBOL
1A
LS164
2 B 8-BIT SHIFT REGISTER
8 CP
MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
9 3 4 5 6 10 11 12 13
VCC = PIN 14
GND = PIN 7
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2
Page 2

SN74LS164
A
1
2
B
8 CP
DQ
CD
DQ
CD
MR
9
VCC = PIN 14
GND = PIN 7
Q0
3
= PIN NUMBERS
Q1
4
LOGIC DIAGRAM
DQ
CD
DQ
CD
DQ
CD
Q2 Q3 Q4
5 6 10
DQ
CD
Q5
11
DQ
CD
DQ
CD
Q6 Q7
12 13
FUNCTIONAL DESCRIPTION
The LS164 is an edge-triggered 8-bit shift register with
serial data entry and an output from each of the eight stages.
Data is entered serially through one of two inputs (A or B);
either of these inputs can be used as an active HIGH Enable
for data entry through the other input. An unused input must
be tied HIGH, or both inputs connected together.
Each LOW-to-HIGH transition on the Clock (CP) input
shifts data one place to the right and enters into Q0 the logical
AND of the two data inputs (AB) that existed before the
rising clock edge. A LOW level on the Master Reset (MR)
input overrides all other inputs and clears the register
asynchronously, forcing all Q outputs LOW.
MODE SELECT — TRUTH TABLE
OPERATING
MODE
Reset (Clear)
INPUTS
MR A
LX
B
X
OUTPUTS
Q0 Q1–Q7
L L–L
Shift
H I I L q0 – q6
H I h L q0 – q6
H h I L q0 – q6
H h h H q0 – q6
L (l) = LOW Voltage Levels
H (h) = HIGH Voltage Levels
X = Don’t Care
qn = Lower case letters indicate the state of the referenced input or output one
qn = set-up time prior to the LOW to HIGH clock transition.
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3
Page 3

SN74LS164
DC CHARACTERISTICS OVER OPERATING
TEMPERATURE RANGE (unless otherwise specified)
Symbol
Parameter
VIH Input HIGH Voltage
Min
2.0
Limits
Typ
Max
Unit
V
VIL Input LOW Voltage
0.8 V
VIK Input Clamp Diode Voltage
VOH Output HIGH Voltage
– 0.65
– 1.5
2.7 3.5
V
V
VOL Output LOW Voltage
0.25 0.4
0.35 0.5
V
V
IIH Input HIGH Current
20 µA
0.1 mA
IIL Input LOW Current
– 0.4
mA
IOS Short Circuit Current (Note 1)
– 20
–100
mA
ICC Power Supply Current
27 mA
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (TA = 25°C)
Symbol
fMAX
tPHL
tPLH
tPHL
Parameter
Maximum Clock Frequency
Propagation Delay
MR to Output Q
Propagation Delay
Clock to Output Q
Limits
Min Typ Max
25 36
24 36
17 27
21 32
Unit
MHz
ns
ns
AC SETUP REQUIREMENTS (TA = 25°C)
Symbol
tW
ts
th
trec
Parameter
CP, MR Pulse Width
Data Setup Time
Data Hold Time
MR to Clock Recovery Time
Limits
Min Typ Max
20
15
5.0
20
Unit
ns
ns
ns
ns
Test Conditions
Guaranteed Input HIGH Voltage for
All Inputs
Guaranteed Input LOW Voltage for
All Inputs
VCC = MIN, IIN = – 18 mA
VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
IOL = 4.0 mA
IOL = 8.0 mA
VCC = VCC MIN,
VIN = VIH or VIL
per Truth Table
VCC = MAX, VIN = 2.7 V
VCC = MAX, VIN = 7.0 V
VCC = MAX, VIN = 0.4 V
VCC = MAX
VCC = MAX
Test Conditions
VCC = 5.0 V
CL = 15 pF
Test Conditions
VCC = 5.0 V
http://onsemi.com
4
Page 4
Part Number 74LS164
Manufactur ON Semiconductor
Description LOW POWER SCHOTTKY
Total Page 8 Pages
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