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Xicor
Xicor

X20C17P-45 Datasheet Preview

X20C17P-45 Datasheet

High Speed AUTOSTORE NOVRAM

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X20C17P-45 pdf
APPLICATION NOTE
AVA I L A B L E
X20C17 AN56
16K X20C17
High Speed AUTOSTORE™ NOVRAM
2K x 8 Bit
FEATURES
24-Pin Standard SRAM DIP Pinout
Fast Access Time: 35ns, 45ns, 55ns
High Reliability
—Endurance: 1,000,000 Nonvolatile Store
Operations
—Retention: 100 Years Minimum
AUTOSTORE™ NOVRAM
—Automatically Stores SRAM Data Into the
E2PROM Array When VCC Low Threshold is
Detected
—E2PROM Data Automatically Recalled Into
RAM Upon Power-up
Low Power CMOS
—Standby: 250µA
Infinite E2PROM Array Recall, and RAM Read
and Write Cycles
DESCRIPTION
The Xicor X20C17 is a 2K x 8 NOVRAM featuring a high-
speed static RAM overlaid bit-for-bit with a nonvolatile
electrically erasable PROM (E2PROM) and the
AUTOSTORE feature which automatically saves the
RAM contents to E2PROM at power-down. The X20C17
is fabricated with advanced CMOS floating gate technol-
ogy to achieve high speed with low power and wide
power-supply margin. The X20C17 features a compat-
ible JEDEC approved byte-wide memory pinout for
industry standard SRAMs.
The NOVRAM design allows data to be easily trans-
ferred from RAM to E2PROM (store) and E2PROM to
RAM (recall). The store operation is completed in 2.5ms
or less. An automatic array recall operation reloads the
contents of the E2PROM into RAM upon power-up.
Xicor NOVRAMS are designed for unlimited write
operations to RAM, either from the host or recalls from
E2PROM, and a minimum 1,000,000 store operations to
the E2PROM. Data retention is specified to be greater
than 100 years.
PIN CONFIGURATION
PLASTIC
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
VSS
1 24
2 23
3 22
4 21
5 20
6 19
X20C17
7 18
8 17
9 16
10 15
11 14
12 13
VCC
A8
A9
WE
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
2015 ILL F02.1
AUTOSTORE™ NOVRAM is a trademark of Xicor, Inc.
©Xicor, Inc. 1992, 1995 Patents Pending
2015-2.5 8/1/97 T1/C0/D0 SH
1
Characteristics subject to change without notice



Xicor
Xicor

X20C17P-45 Datasheet Preview

X20C17P-45 Datasheet

High Speed AUTOSTORE NOVRAM

No Preview Available !

X20C17P-45 pdf
X20C17
PIN DESCRIPTIONS
Addresses (A0–A10)
The Address inputs select an 8-bit memory location
during a read or write operation.
Chip Enable (CE)
The Chip Enable input must be LOW to enable all read/
write operations. When CE is HIGH, power consumption
is reduced.
Output Enable (OE)
The Output Enable input controls the data output buffers
and is used to initiate read and recall operations. Output
Enable LOW disables a store operation regardless of
the state of CE, WE.
Data In/Data Out (I/O0–I/O7)
Data is written to or read from the X20C17 through the
I/O pins. The I/O pins are placed in the high impedance
state when either CE or OE is HIGH.
Write Enable (WE)
The Write Enable input controls the writing of data to the
static RAM.
FUNCTIONAL DIAGRAM
PIN NAMES
Symbol
A0–A10
I/O0–I/O7
WE
CE
OE
VCC
VSS
Description
Address Inputs
Data Input/Output
Write Enable
Chip Enable
Output Enable
+5V
Ground
2015 PGM T01
A3–A8
CE
OE
WE
A0–A2
A9–A10
CONTROL
LOGIC
VCC SENSE
EEPROM ARRAY
ROW
SELECT
HIGH SPEED
2K x 8
SRAM
ARRAY
COLUMN
SELECT
&
I/OS
I/O0–I/O7
2
2015 FHD F01.1


Part Number X20C17P-45
Description High Speed AUTOSTORE NOVRAM
Maker Xicor
Total Page 11 Pages
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