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 Vishay Intertechnology Electronic Components Datasheet

71128 Datasheet

Simple Solution for Dynamically Programming the Output Voltage of DC-DC Converters

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AN731
Vishay Siliconix
Simple Solution for Dynamically Programming the
Output Voltage of DC-DC Converters
INTRODUCTION
Figure 1 shows a typical dc-to-dc converter configuration. As in
many PWM controllers, the non-inverting input of the voltage
feedback error amplifier is internally connected to the
reference voltage, Vr. The output voltage of the converter is set
by a resistor divider network R1 and R2. This configuration
enables a fixed output voltage that is equal to or greater than
the reference voltage. But in many power conversion designs,
it is useful to vary the output to a value lower than the reference
voltage and to dynamically adjust the output voltage. The
op-amp circuit shown in Figure 3 gives designers a simple way
to do this. Scaling the output voltage with respect to a control
voltage VC is totally flexible. This application note describes
how to use this simple solution and provides a step-by-step
design procedure to assist designers in calculating the specific
parameters required by their circuits.
DESIGN REQUIREMENT
Reference voltage, Vr
Control voltage: VC = VC1 to VC2
Output voltage: VO = VO1 at VC = VC1, VO = VO2 at VC = VC2,
and VO is linear for any value of VC in its range.
These design requirements are shown in Figure 2. The output
voltage is a linear function with respect to the control voltage.
The function crosses two end points A = (VC1, VO1) and B =
(VC2, VO2).
VIN Power Stage
VOUT
PWM
+
EA
PWM Controller
FB
Vr
R1
R2
FIGURE 1. Typical DC/DC Converter Configuration
VO (V)
B (VC2, VO2)
A (VC1, VO1)
VC (V)
FIGURE 2. Output Voltage vs Control Voltage Requirement
VIN
Document Number: 71128
28-Jan-00
Power Stage
VOUT
PWM
+
EA
PWM Controller
FB
Vr
R1
A
R2
VX
R3
LM358
B
+ Vr2
R4
Op-Amp Circuit
FIGURE 3. Op-Amp Circuit Offers Programmable Output Function
VC
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 Vishay Intertechnology Electronic Components Datasheet

71128 Datasheet

Simple Solution for Dynamically Programming the Output Voltage of DC-DC Converters

 No Preview Available !
AN731
Vishay Siliconix
CIRCUIT ANALYSIS
In a closed-loop power supply, node A will servo to attain a
voltage equal to VR. Node B will servo to attain a voltage equal
to Vr2. Assuming an ideal op-amp and using Kirchkorf’s current
law at node A and B, we have:
(Vo *
R1
Vr)
+
(Vr
* Vx)
R2
and
(Vx
* Vr2)
R3
+
(Vr2 *
R4
Vc)
(1)
Let:
M1
+
R2
R1
and
M2
+
R3
R4
Solve for VX,
Vx + (1 ) m1)Vr * m1Vo
and
Vx + (1 ) m2)Vr2 * m2Vc
(2)
(3)
Equate the above two equations and solve for VO:
ǒ Ǔ ǒ ǓVo +
1
m1
)
1
Vr *
1 ) m2
m1
Vr2
)
m2
m1
Vc
+
b ) aVc
Where:
(4)
a
+
m2
m1
and
ǒ Ǔ ǒ Ǔb +
1
m1
)
1
Vr
*
1 ) m2
m1
Vr2
(5)
So, VO is a linear function with respect to VC. The function has
slope a and y intercept b.
A curve-fitting technique is used to force the equation (4) to
follow the requirement. This is done in two steps:
Matching the slope:
a
+
Vo2
Vc2
*
*
Vo1
Vc1
+
m2
m1
Matching one point: Pick point B VO2 = b + aVC2
(6)
ǒ Ǔ ǒ Ǔ³ b + Vo2 * aVc2 +
1
m1
)
1
Vr *
1
m1
)
a
Vr2
Equate (4) and (5) and solve for m1
(7)
m1
+
Vo2
)
Vr * Vr2
a(Vr2 * Vc2)
*
Vr
(8)
Note:
m1
+
R2
R1
(9)
Since m1 is the ratio of 2 real resistors, it must be a positive
number. Furthermore, m1 should not be too small or too large
to have realistic resistor values for R1 and R2. There are two
valid scenarios:
1. Vr – Vr2 > 0 and Vo2 + a(Vr2 – Vc2)–Vr > 0 or,
2. Vr – Vr2 < 0 and Vo2 + a(Vr2 – Vc2)–Vr < 0
Both of these present a restricted range of values for Vr2 to give
a meaningful value of m1. Once Vr2 is chosen correctly, m1
and the rest of the parameter values can be determined.
DESIGN PROCEDURE AND EXAMPLE
Given:
A = (VC1, VO1) = (0.2 V, 0.4 V), B = (VC2, VO2) = (2.7 V, 3.4 V)
Vr = 1.3 V, R1 = 22.1 kW. Also, 1 V < VX < 3 V.
Calculate the slope, a:
a
+
Vo2
Vc2
*
*
Vo1
Vc1
+
3.4
2.7
*
*
0.4
0.2
+
1.2
Determine Vr2:
(10)
Choose a sensible value of Vr2 to satisfy either (1) or (2) above.
Since it is easier to derive a value for Vr2 that is smaller than Vr
(by using a simple resistor voltage divider), scenario (1) is used
here.
Vr–Vr2 u 0 å Vr2 t Vr + 1.3 V
and,
Vo2 ) a(Vr2–Vc2)–Vr u 0 å Vr2 u
Vr–Vo2
a
)
Vc2
+
1.3
V–3.4
1.2
V ) 2.7 +
0.95V
(11)
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Document Number: 71128
28-Jan-00

 Vishay Intertechnology Electronic Components Datasheet

71128 Datasheet

Simple Solution for Dynamically Programming the Output Voltage of DC-DC Converters

 No Preview Available !
AN731
Vishay Siliconix
To limit the common mode range of VX, the following equations
can be used:
1. To keep VX equal or greater than a minimum value, VXm=
1 V:
Vr2
w
Vxm(Vo2–Vr–aVc2) ) aVc2Vr
Vo2 ) a(Vr–Vxm)–Vr
+
1(3.4–1.3–1.2 2.7) ) 1.2 2.7
3.4 ) 1.2(1.3–1)–1.3
1.3 + 1.249
(12)
2. To keep VX equal or less than a maximum value, VXm =
3 V:
Vr2
w
VxM(Vo2–Vr–aVc2) ) aVc1Vr
Vo2 ) a(Vr–VxM–Vc2 ) Vc1)–Vr
+
2(3.4–1.3–1.2 2.7) ) 1.2 0.2
3.4 ) 1.2(1.3–2–2.7 ) 0.2)–1.3
1.3 + 1.13
V
(13)
So, Vr2 can be any value between 1.249 V and 1.3 V. Choose
Vr2 = 1.25 V.
Calculate m1 and then R2:
m1
+
Vo2
)
Vr–Vr2
a(Vr2–Vc2)–Vr
+
3.4
)
1.3–1.25
1.2(1.25–2.7)–1.3
+
0.139
m1
+
R2
R1
å
R2
+
m1R1
+
0.139
(14)
22.1 k + 3.07 kW
Choose R2 = 3.01 kW as a practical value
Calculate R3 and R4:
a
+
m2
m1
+
R3
m1R4
å
R3
+
am1R4
(15)
Choose R4, then calculate R3. The value of R4 should be large
enough such that the current going through it will not be so
large as to cause excessive power dissipation under extreme
conditions. On the other hand, R4 should be small enough that
its current will not be overly sensitive to noise and op-amp bias
current.
If R4 is set at 22.1k, then R3 = 3.68 k, and we can choose R3
= 3.60 k as a practical value.
Express VO as a function of VC, using practical values of R’s:
a
+
m2
m1
+
R1R3
R2R4
+
22.1kx3.68k
3.01kx22.1k
+
1.223
ǒ Ǔ ǒ Ǔb +
1
m1
)
1
Vr–
1
m1
)
a
Vr2 +
ǒ Ǔ ǒ ǓR1
R2
)
1
Vr–
R1
R2
)
a
Vr2
ǒ Ǔ ǒ Ǔb +
22.1k
3.01k
)
1
1.3–
22.1k
3.01k
)
1.223
1.25 + 0.1389
(16)
Document Number: 71128
28-Jan-00
The final result: VO = aVC + b = 1.223 x VC + 0.1389
EXPERIMENTAL RESULTS
A circuit was built and tested (see Figure 5). The result is
tabulated in Table 1 and plotted in Figure 4:
TABLE 1
VX VO
VC Measured Calculated Measured Required
0.1 1.43
0.26
0.32
0.2 1.42
0.38
0.42
0.40
0.4 1.38
0.63
0.68
0.64
0.8 1.32
1.12
1.16
1.12
1.2 1.25
1.61
1.66
1.60
1.6 1.19
2.10
2.12
2.08
2.0 1.11
2.58
2.68
2.56
2.4 1.05
3.07
3.11 3.04
2.6 1.02
3.32
3.33
3.28
2.7 1.00
3.44
3.46
3.40
2.8 0.99
3.56
3.58
3.0 0.96
3.81
3.78
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
VO
VX Measured
0.5 1.0 1.5 2.0 2.5 3.0
Control Voltage—VC (v)
FIGURE 4.
The measured values are very much in agreement with the
calculated and required values. A negligible error results from
the difference between an ideal op-amp and the actual circuit
with its finite offset voltage and bias current.
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