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Toshiba Electronic Components Datasheet

TC58NVG2S0FTA00 Datasheet

4 GBIT (512M x 8 BIT) CMOS NAND E2PROM

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TC58NVG2S0FTA00 pdf
TC58NVG2S0FTA00
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
4 GBIT (512M × 8 BIT) CMOS NAND E2PROM
DESCRIPTION
The TC58NVG2S0F is a single 3.3V 4 Gbit (4,529,848,320 bits) NAND Electrically Erasable and Programmable
Read-Only Memory (NAND E2PROM) organized as (4096 + 224) bytes × 64 pages × 2048blocks.
The device has two 4320-byte static registers which allow program and read data to be transferred between the
register and the memory cell array in 4320-byte increments. The Erase operation is implemented in a single block
unit (256 Kbytes + 14 Kbytes: 4320 bytes × 64 pages).
The TC58NVG2S0F is a serial-type memory device which utilizes the I/O pins for both address and data
input/output as well as for command inputs. The Erase and Program operations are automatically executed making
the device most suitable for applications such as solid-state file storage, voice recording, image file memory for still
cameras and other systems which require high-density non-volatile memory data storage.
FEATURES
Organization
Memory cell array
Register
Page size
Block size
x8
4320 × 128K × 8
4320 × 8
4320 bytes
(256K + 14K) bytes
Modes
Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy,
Multi Page Program, Multi Block Erase, Multi Page Copy, Multi Page Read
Mode control
Serial input/output
Command control
Number of valid blocks
Min 2008 blocks
Max 2048 blocks
Power supply
VCC = 2.7V to 3.6V
Access time
Cell array to register 30 µs max
Serial Read Cycle
25 ns min (CL=100pF)
Program/Erase time
Auto Page Program
Auto Block Erase
300 µs/page typ.
3 ms/block typ.
Operating current
Read (25 ns cycle)
Program (avg.)
Erase (avg.)
Standby
30 mA max.
30 mA max
30 mA max
50 µA max
Package
TSOP I 48-P-1220-0.50 (Weight: 0.53 g typ.)
4bit ECC for each 512Byte is required.
1 2012-09-01


Toshiba Electronic Components Datasheet

TC58NVG2S0FTA00 Datasheet

4 GBIT (512M x 8 BIT) CMOS NAND E2PROM

No Preview Available !

TC58NVG2S0FTA00 pdf
PIN ASSIGNMENT (TOP VIEW)
PINNAMES
×8
NC
NC
NC
NC
NC
NC
RY / BY
RE
CE
NC
NC
VCC
VSS
NC
NC
CLE
ALE
WE
WP
NC
NC
NC
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
TC58NVG2S0FTA00
I/O1 to I/O8
CE
WE
RE
CLE
ALE
WP
RY/BY
VCC
VSS
I/O port
Chip enable
Write enable
Read enable
Command latch enable
Address latch enable
Write protect
Ready/Busy
Power supply
Ground
TC58NVG2S0FTA00
×8
48 NC
47 NC
46 NC
45 NC
44 I/O8
43 I/O7
42 I/O6
41 I/O5
40 NC
39 NC
38 NC
37 VCC
36 VSS
35 NC
34 NC
33 NC
32 I/O4
31 I/O3
30 I/O2
29 I/O1
28 NC
27 NC
26 NC
25 NC
2 2012-09-01


Part Number TC58NVG2S0FTA00
Description 4 GBIT (512M x 8 BIT) CMOS NAND E2PROM
Maker Toshiba
Total Page 30 Pages
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