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Texas Instruments (TI) Electronic Components Datasheet

SN100KT5574 Datasheet

OCTAL ECL-TO-TTL TRANSLATOR

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SN100KT5574 pdf
SN100KT5574
OCTAL ECLĆTOĆTTL TRANSLATOR WITH DĆTYPE
EDGEĆTRIGGERED FLIPĆFLOPS AND 3ĆSTATE OUTPUTS
SDZS009 − D3418, JANUARY 1990
100K Compatible
ECL Clock and TTL Control Inputs
DW OR NT PACKAGE
(TOP VIEW)
Flow-Through Architecture Optimizes PCB
Layout
Center Pin VCC, VEE, and GND
Configurations Minimize High-Speed
Switching Noise
Package Options Include “Small Outline”
1Q
2Q
3Q
4Q
VCC
GND
1
2
3
4
5
6
24 1D
23 2D
22 3D
21 4D
20 OE(TTL)
19 VEE
Packages and Standard Plastic DIPs
GND 7
18 GND
description
GND 8
5Q 9
17 CLK(ECL)
16 5D
This octal ECL-to-TTL translator is designed to
provide efficient translation between a 100K ECL
signal environment and a TTL signal environment.
6Q 10
7Q 11
8Q 12
15 6D
14 7D
13 8D
This device is designed specifically to improve the performance and density of ECL-to-TTL CPU/bus-oriented
functions such as memory-address drivers, clock drivers, and bus-oriented receivers and transmitters.
The eight flip-flops of the SN100KT5574 are edge-triggered D-type flip-flops. On the positive transition of the
clock, the Q outputs are set to the logic levels that were set up at the D inputs.
A buffered output-enable input (OE) can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance third state and increased drive provide the capability to drive
bus lines without need for interface or pullup components.
The output-enable input OE does not affect the internal operations of the flip-flops. Old data can be retained
or new data can be entered while the outputs are off.
The SN100KT5574 is characterized for operation from 0°C to 85°C.
FUNCTION TABLE
INPUTS
OUTPUT
(TTL)
OE CLK D
Q
L L
L
L H
H
L LX
Qo
H XX
Z
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard
warranty. Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 1990, Texas Instruments Incorporated
1


Texas Instruments (TI) Electronic Components Datasheet

SN100KT5574 Datasheet

OCTAL ECL-TO-TTL TRANSLATOR

No Preview Available !

SN100KT5574 pdf
SN100KT5574
OCTAL ECLĆTOĆTTL TRANSLATOR WITH DĆTYPE
EDGEĆTRIGGERED FLIPĆFLOPS AND 3ĆSTATE OUTPUTS
logic symbol
17
CLK
ECL/TTL
20
OE
EN
C1
1D 24
23
2D
22
3D
21
4D
16
5D
15
6D
14
7D
13
8D
1D ECL/TTL
logic diagram (positive logic)
OE
CLK
20
17
ECL/TTL
1
1Q
2
2Q
3 3Q
4
4Q
9 5Q
10
6Q
11
7Q
12 8Q
24
1D
23
2D
22
3D
21
4D
ECL/TTL
ECL/TTL
ECL/TTL
ECL/TTL
C1
1D
C1
1D
C1
1D
C1
1D
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
16
5D
15
6D
ECL/TTL
ECL/TTL
C1
1D
C1
1D
14
7D
ECL/TTL
C1
1D
8D 13
ECL/TTL
C1
1D
1
1Q
2
2Q
3
3Q
4
4Q
9
5Q
10
6Q
11
7Q
12
8Q
2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265


Part Number SN100KT5574
Description OCTAL ECL-TO-TTL TRANSLATOR
Maker Texas
Total Page 7 Pages
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