• 100K Compatible
• Open-Collector Outputs Drive Bus Lines or
Buffer Memory Address Registers
• ECL and TTL Output-Enable Inputs
• Flow-Through Architecture Optimizes PCB
• Center-Pin VCC, VEE, and GND
Configurations Minimize High-Speed
• Package Options Include “Small Outline”
Packages and Standard Plastic 300-mil
OCTAL ECLĆTOĆTTL TRANSLATOR
WITH OPENĆCOLLECTOR OUTPUTS
SDZS008 − JANUARY 1990 − REVISED OCTOBER 1990
OR NT PACKAGE
20 OE2 (TTL)
17 OE1 (ECL)
This octal ECL-to-TTL translator is designed to provide efficient translation between a 100K signal environment
and a TTL signal environment. This device is designed specifically to improve the performance and density of
ECL-to-TTL CPU/bus-oriented functions such as memory-address drivers, clock drivers, and bus-oriented
receivers and transmitters while eliminating the need for three-state overlap protection.
Two pins OE1 and OE2 are provided for output-enable control. These control inputs are ANDed together with
OE1 being ECL-compatible and OE2 being TTL-compatible. This offers the choice of controlling the outputs
of the device from either a TTL or ECL signal environment.
The SN100KT5539 is characterized for operation from 0°C to 85°C.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
•POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 1990, Texas Instruments Incorporated