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W196 Datasheet Preview

W196 Datasheet

Spread Spectrum FTG

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W196 pdf
W196
Spread Spectrum FTG for 440BX and VIA Apollo Pro-133
1W196
Features
• Maximized EMI suppression using Cypress’s Spread
Spectrum Technology
www.DataSheetS4Uys.ctoemm frequency synthesizer for 440BX, 440ZX, and
VIA Apollo Pro-133
• I2C programmable to 155 MHz (32 selectable
frequencies)
• Two skew-controlled copies of CPU output
• Seven copies of PCI output (synchronous w/CPU
output)
• One copy of 14.31818-MHz IOAPIC output
• One copy of 48-MHz USB output
• Selectable 24-/48-MHz clock is determined by resistor
straps on power up
• One high-drive output buffer that produces a copy of
the 14.318-MHz reference
• Isolated core VDD pin for noise reduction
Key Specifications
Supply Voltages:........................................VDDQ3 = 3.3V±5%
...............................................................................................
VDDQ2 = 2.5V±5%
CPU Cycle to Cycle Jitter: ......................................... 250 ps
CPU, PCI Output Edge Rate: t1 V/ns
CPU0:1 Output Skew: ................................................ 175 ps
PCI_F, PCI1:6 Output Skew: ...................................... 500 ps
CPU to PCI Skew: ........................1.5 to 4.0 ns (CPU Leads)
REF2X/SEL48#, SCLOCK, SDATA: ...............250-k: pull-up
FS1: ........................................................... 250-k: pull-down
FS0: .................................................. No pull-up or pull-down
Note: Internal pull-up or pull-down resistors should not be
relied upon for setting I/O pins HIGH or LOW.
Table 1. Pin Selectable Frequency
FS1 FS0 CPU(0:1) PCI
1 1 133.3 MHz 33.3 MHz
1
0
105 MHz
35 MHz
0
1
100 MHz
33.3 MHz
0 0 66.8 MHz 33.3 MHz
Rev 1.0, November 28, 2006
2200 Laurelwood Road, Santa Clara, CA 95054
Tel:(408) 855-0555 Fax:(408) 855-0550
Page 1 of 11
www.SpectraLinear.com



SpectraLinear
SpectraLinear

W196 Datasheet Preview

W196 Datasheet

Spread Spectrum FTG

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W196 pdf
Block Diagram
X1 XTAL
X2 OSC
PLL Ref Freq
www.DataSheet4U.com
FS1 PLL 1
FS0
÷2/÷3
SDATA
SCLOCK
I2C
LOGIC
PLL2
W196
VDDQ3
REF2X/SEL48#
GND
VDDQ3
IOAPIC
VDDQ2
CPU0
CPU1
GND
VDDQ3
PCI_F
PCI1
PCI2
PCI3
PCI4
PCI5
PCI6
GND
Pin Configuration
X1
X2
GND
PCI_F
PCI1
PCI2
PCI3
PCI4
VDDQ3
PCI5
PCI6
VDDQ3
48MHz
24_48MHz/FS1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 GND
27 REF2X/SEL48#
26 VDDQ3
25 VDDQ2
24 IOAPIC
23 VDDQ2
22 CPU0
21 CPU1
20 VDDQ3
19 GND
18 SDATA
17 SCLOCK
16 FS0
15 GND
VDDQ3
48MHz
24_48MHz/FS1
GND
Rev 1.0, November 28, 2006
Page 2 of 11


Part Number W196
Description Spread Spectrum FTG
Maker SpectraLinear
Total Page 11 Pages
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