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STMicroelectronics Electronic Components Datasheet

RIVA128ZX Datasheet

128-BIT 3D MULTIMEDIA ACCELERATOR

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RIVA128ZX pdf
® RIVA 128ZX
128-BIT 3D MULTIMEDIA ACCELERATOR
PRELIMINARY DATA
KEY FEATURES
Fast 32-bit VGA/SVGA
High performance 128-bit 2D/GUI/DirectDraw
Acceleration
Interactive, Photorealistic Direct3D Accelera-
tion with advanced effects
Pinout backwards compatible with RIVA 128
Massive 1.6Gbytes/s, 100MHz 128-bit wide
8MByte SGRAM framebuffer interface
Adds 16Mbit SDRAM support for cost sensitive
8MByte framebuffer applications
Video Acceleration for DirectDraw/DirectVideo,
MPEG-1/2 and Indeo®
- Planar 4:2:0 and packed 4:2:2 Color Space
Conversion
- X and Y smooth up and down scaling
250MHz Palette-DAC supporting up to
1600x1200@85Hz
NTSC and PAL output with flicker-filter
Multi-function Video Port and serial interface
Bus mastering DMA Accelerated Graphics Port
(AGP) 1.0 Interface supporting 133MHz 2X
data transfer mode
Bus mastering DMA PCI 2.1 interface
ACPI power management interface support
0.35 micron 5LM CMOS
300 PBGA
DESCRIPTION
The RIVA128ZXoffers unparalleled 2D and 3D
performance, meeting all the requirements of the
mainstream PC graphics market and Microsoft’s
PC’97. RIVA128ZX combines all the features of
RIVA 128 plus 8MByte SDRAM and SGRAM
based framestore support and AGP 2X data trans-
fer. It provides the most advanced Direct3Dac-
celeration solution and delivers leadership VGA,
2D and Video performance, enabling a range of
applications from 3D games through to DVD, In-
tercastand video conferencing.
BLOCK DIAGRAM
1.6 GByte/s
Internal Bus
Bandwidth
DMA Bus
Host
PCI/AGP Interface
FIFO/
DMA
Pusher
VGA
Video Port
DMA Engine
Graphics Engine
128 bit 2D
Direct3D
DMA Engine
Palette DAC
YUV - RGB,
X & Y scaler
8MByte
SDRAM/SGRAM
Interface
CCIR656
Video
Monitor/
TV
128 bit
interface
June 1998
The information in this datasheet is subject to change
7071857 00
1/85


STMicroelectronics Electronic Components Datasheet

RIVA128ZX Datasheet

128-BIT 3D MULTIMEDIA ACCELERATOR

No Preview Available !

RIVA128ZX pdf
RIVA128ZX
128-BIT 3D MULTIMEDIA ACCELERATOR
TABLE OF CONTENTS
1 RIVA128ZX 300PBGA DEVICE PINOUT....................................................................................... 4
2 PIN DESCRIPTIONS ...................................................................................................................... 5
2.1 ACCELERATED GRAPHICS PORT (AGP) INTERFACE .....................................................
2.2 PCI 2.1 LOCAL BUS INTERFACE ........................................................................................
2.3 FRAMEBUFFER INTERFACE ..............................................................................................
2.4 VIDEO PORT.........................................................................................................................
2.5 DEVICE ENABLE SIGNALS ..................................................................................................
2.6 DISPLAY INTERFACE ..........................................................................................................
2.7 VIDEO DAC AND PLL ANALOG SIGNALS ..........................................................................
2.8 POWER SUPPLY ..................................................................................................................
2.9 TEST......................................................................................................................................
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3 OVERVIEW OF THE RIVA128ZX .................................................................................................. 10
3.1 BALANCED PC SYSTEM......................................................................................................
3.2 HOST INTERFACE ...............................................................................................................
3.3 2D ACCELERATION .............................................................................................................
3.4 3D ENGINE ...........................................................................................................................
3.5 VIDEO PROCESSOR............................................................................................................
3.6 VIDEO PORT.........................................................................................................................
3.7 DIRECT RGB OUTPUT TO LOW COST PAL/NTSC ENCODER .........................................
3.8 SUPPORT FOR STANDARDS..............................................................................................
3.9 RESOLUTIONS SUPPORTED..............................................................................................
3.10 CUSTOMER EVALUATION KIT ............................................................................................
3.11 TURNKEY MANUFACTURING PACKAGE ...........................................................................
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4 ACCELERATED GRAPHICS PORT (AGP) INTERFACE ............................................................. 14
4.1 RIVA128ZX AGP INTERFACE .............................................................................................. 15
4.2 AGP BUS TRANSACTIONS.................................................................................................. 15
5 PCI 2.1 LOCAL BUS INTERFACE................................................................................................. 23
5.1 RIVA128ZX PCI INTERFACE ............................................................................................... 23
5.2 PCI TIMING SPECIFICATION ............................................................................................... 24
6 FRAMEBUFFER INTERFACE ....................................................................................................... 30
6.1 SDRAM INTERFACE ............................................................................................................ 31
6.2 SGRAM INTERFACE ............................................................................................................ 32
6.3 SDRAM/SGRAM ACCESSES AND COMMANDS ................................................................ 35
6.4 LAYOUT OF FRAMEBUFFER CLOCK SIGNALS ................................................................ 37
6.5 FRAMEBUFFER INTERFACE TIMING SPECIFICATION .................................................... 37
7 VIDEO PLAYBACK ARCHITECTURE........................................................................................... 42
7.1 VIDEO SCALER PIPELINE ................................................................................................... 43
8 VIDEO PORT .................................................................................................................................. 45
8.1 VIDEO INTERFACE PORT FEATURES ............................................................................... 45
8.2 BI-DIRECTIONAL MEDIA PORT POLLING COMMANDS USING MPC .............................. 46
8.3 TIMING DIAGRAMS .............................................................................................................. 47
8.4 656 MASTER MODE ............................................................................................................. 51
8.5 VBI HANDLING IN THE VIDEO PORT ................................................................................. 52
8.6 SCALING IN THE VIDEO PORT ........................................................................................... 52
9 BOOT ROM INTERFACE............................................................................................................... 53
2/85


Part Number RIVA128ZX
Description 128-BIT 3D MULTIMEDIA ACCELERATOR
Maker STMicroelectronics
Total Page 30 Pages
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