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Renesas Electronics Components Datasheet

NP55N03SUG Datasheet

MOS FIELD EFFECT TRANSISTOR

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NP55N03SUG pdf
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
NP55N03SUG
SWITCHING
N-CHANNEL POWER MOS FET
DESCRIPTION
The NP55N03SUG is N-channel MOS Field Effect Transistor designed for high current switching applications.
ORDERING INFORMATION
PART NUMBER
LEAD PLATING
PACKING
NP55N03SUG-E1-AY Note
NP55N03SUG-E2-AY Note
Pure Sn (Tin)
Tape 2500 p/reel
Note Pb-free (This product does not contain Pb in external electrode.)
PACKAGE
TO-252 (MP-3ZK) typ. 0.27 g
FEATURES
Channel temperature 175 degree rated
Low on-state resistance
RDS(on) = 5.0 mΩ MAX. (VGS = 10 V, ID = 28 A)
Low input capacitance
Ciss = 3500 pF TYP. (VDS = 25 V)
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage (VGS = 0 V)
VDSS
30 V
Gate to Source Voltage (VDS = 0 V)
VGSS
±20 V
Drain Current (DC) (TC = 25°C)
Drain Current (pulse) Note1
ID(DC)
ID(pulse)
±55
±220
A
A
Total Power Dissipation (TC = 25°C)
PT1
77 W
Total Power Dissipation (TA = 25°C)
PT2
1.2 W
Channel Temperature
Tch 175 °C
Storage Temperature
Repetitive Avalanche Current Note2
Repetitive Avalanche Energy Note2
Tstg
55 to +175
°C
IAR 33 A
EAR 109 mJ
Notes 1. PW 10 μs, Duty Cycle 1%
2. Tch 150°C, VDD = 15 V, RG = 25 Ω, VGS = 20 0 V, L = 100 μH
(TO-252)
THERMAL RESISTANCE
Channel to Case Thermal Resistance
Channel to Ambient Thermal Resistance
Rth(ch-C)
Rth(ch-A)
1.95
125
°C/W
°C/W
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. D18320EJ2V0DS00 (2nd edition)
Date Published May 2008 NS
Printed in Japan
The mark <R> shows major revised points.
The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.
2006, 2007


Renesas Electronics Components Datasheet

NP55N03SUG Datasheet

MOS FIELD EFFECT TRANSISTOR

No Preview Available !

NP55N03SUG pdf
NP55N03SUG
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
Zero Gate Voltage Drain Current
IDSS VDS = 30 V, VGS = 0 V
Gate Leakage Current
IGSS VGS = ±20 V, VDS = 0 V
Gate to Source Threshold Voltage
Forward Transfer Admittance Note
Drain to Source On-state Resistance Note
VGS(th)
| yfs |
RDS(on)
VDS = VGS, ID = 250 μA
VDS = 10 V, ID = 28 A
VGS = 10 V, ID = 28 A
Input Capacitance
Ciss VDS = 25 V,
Output Capacitance
Coss
VGS = 0 V,
Reverse Transfer Capacitance
Crss f = 1 MHz
Turn-on Delay Time
td(on)
VDD = 15 V, ID = 28 A,
Rise Time
tr VGS = 10 V,
Turn-off Delay Time
td(off)
RG = 0 Ω
Fall Time
tf
Total Gate Charge
QG VDD = 24 V,
Gate to Source Charge
QGS VGS = 10 V,
Gate to Drain Charge
Body Diode Forward Voltage Note
QGD
VF(S-D)
ID = 55 A
IF = 55 A, VGS = 0 V
Reverse Recovery Time
trr IF = 55 A, VGS = 0 V,
Reverse Recovery Charge
Note Pulsed
Qrr di/dt = 100 A/μs
MIN. TYP. MAX. UNIT
1 μA
±100 nA
2.0 3.0 4.0
V
10 20
S
4.0 5.0 mΩ
3500 5300 pF
400 600 pF
260 470 pF
32 70 ns
52 130 ns
73 150 ns
12 30 ns
62 93 nC
14 nC
21 nC
0.92 1.5
V
40 ns
34 nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG = 25 Ω
PG.
VGS = 20 0 V
50 Ω
L
VDD
BVDSS
ID
VDD
IAS
VDS
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
RG
PG.
VGS
0
τ
τ = 1 μs
Duty Cycle 1%
RL
VDD
VGS
VGS
Wave Form
10%
0
VDS
90%
VDS
VDS
Wave Form
0
td(on)
VGS 90%
90%
10% 10%
tr td(off) tf
ton toff
D.U.T.
IG = 2 mA
PG. 50 Ω
RL
VDD
2 Data Sheet D18320EJ2V0DS


Part Number NP55N03SUG
Description MOS FIELD EFFECT TRANSISTOR
Maker Renesas
Total Page 7 Pages
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