Absolute Maximum Ratings (Notes 1, 3)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage, VCC
Bias Voltage, VBB
Input Voltage, VIN
0V to 6V
Storage Temperature Range,TSTG
−65˚C to +150˚C
Lead Temperature (Soldering, ≤10 sec.)
ESD Tolerance, Human Body Model
Operating Ranges (Note 2)
VCC +60V to +85V
VBB +10V to +15V
VIN +1V to +5V
+15 to +75V
−20˚C to +100˚C
Do not operate the part without a heat sink.
Electrical Characteristics (See Figure 2 for Test Circuit)
Unless otherwise noted: VCC = +80V, VBB = +12V, VIN = +3.3V, No AC Input, CL = 8pF, TC = 60˚C
Min Typ Max
DC Output Voltage
DC Voltage Gain
Per Channel, No Output Load
All three channels
VIN = 1.9V
(Notes 4, 5)
10 16 22 mA
15 25 35 mA
62 65 68 VDC
−12 −14 −16
tR Rise Time (Notes 6, 7) 10% to 90%, 40 VPP Output (1 MHz)
tF Fall Time (Notes 6, 7) 90% to 10%, 40 VPP Output (1 MHz)
Overshoot (Note 6)
(Note 6), 40 VPP Output (1 MHz)
3.7 4.7 ns
4.4 5.4 ns
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2: Operating ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and
test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may
change when the device is not operated under the listed test conditions.
Note 3: All voltages are measured with respect to GND, unless otherwise specified.
Note 4: Calculated value from Voltage Gain test on each channel.
Note 5: Linearity Error is the variation in dc gain from VIN = 1.6V to VIN = 5V.
Note 6: Input from signal generator: tr, tf < 1 ns.
Note 7: 100% tested in production. These limits are not used to calculate outgoing quality levels.
AC Test Circuit
FIGURE 2. Test Circuit (One Channel)
Figure 2 shows a typical test circuit for evaluation of the
LM2413. This circuit is designed to allow testing of the
LM2413 in a 50Ω environment without the use of an expen-
sive FET probe. The combined resistors of 4950Ω at the out-
put form a 200:1 voltage divider when connected to a 50Ω
load. The compensation cap is used to flatten the frequency
response of the 200:1 divider.