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National Semiconductor Electronic Components Datasheet

DAC1232 Datasheet

Double-Buffered D to A Converters

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DAC1232 pdf
February 1995
MICRO-DACTM DAC1208 DAC1209 DAC1210 DAC1230
DAC1231 DAC1232 12-Bit mP Compatible
Double-Buffered D to A Converters
General Description
The DAC1208 and the DAC1230 series are 12-bit multiply-
ing D to A converters designed to interface directly with a
wide variety of microprocessors (8080 8048 8085 Z-80
etc ) Double buffering input registers and associated con-
trol lines allow these DACs to appear as a two-byte ‘‘stack’’
in the system’s memory or I O space with no additional in-
terfacing logic required
The DAC1208 series provides all 12 input lines to allow sin-
gle buffering for maximum throughput when used with 16-bit
processors These input lines can also be externally config-
ured to permit an 8-bit data interface The DAC1230 series
can be used with an 8-bit data bus directly as it internally
formulates the 12-bit DAC data from its 8 input lines All of
these DACs accept left-justified data from the processor
The analog section is a precision silicon-chromium (Si-Cr)
R-2R ladder network and twelve CMOS current switches
An inverted R-2R ladder structure is used with the binary
weighted currents switched between the IOUT1 and IOUT2
maintaining a constant current in each ladder leg indepen-
dent of the switch state Special circuitry provides TTL logic
input voltage level compatibility
The DAC1208 series and DAC1230 series are the 12-bit
members of a family of microprocessor compatible DACs
(MICRO-DACsTM) For applications requiring other resolu-
tions the DAC1000 series for 10-bit and DAC0830 series
for 8-bit are available alternatives
Features
Y Linearity specified with zero and full-scale adjust only
Y Direct interface to all popular microprocessors
Y Double-buffered single-buffered or flow through digital
data inputs
Y Logic inputs which meet TTL voltage level specs (1 4V
logic threshold)
Y Works with g10V reference full 4-quadrant
multiplication
Y Operates stand-alone (without mP) if desired
Y All parts guaranteed 12-bit monotonic
Y DAC1230 series is pin compatible with the DAC0830
series 8-bit MICRO-DACs
Key Specifications
Y Current Settling Time
Y Resolution
Y Linearity (Guaranteed
over temperature)
Y Gain Tempco
Y Low Power Dissipation
Y Single Power Supply
1 ms
12 Bits
10 11 or 12 Bits of FS
1 3 ppm C
20 mW
5 VDC to 15 VDC
Typical Application
TRI-STATE is a registered trademark of National Semiconductor Corp
MICRO-DACTM is a trademark of National Semiconductor Corp
C1995 National Semiconductor Corporation TL H 5690
TL H 5690 – 1
RRD-B30M115 Printed in U S A


National Semiconductor Electronic Components Datasheet

DAC1232 Datasheet

Double-Buffered D to A Converters

No Preview Available !

DAC1232 pdf
Absolute Maximum Ratings
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
(Notes 1 and 2)
Supply Voltage (VCC)
Voltage at Any Digital Input
Voltage at VREF Input
Storage Temperature Range
17 VDC
VCC to GND
g25V
b65 C to a150 C
Package Dissipation at TAe25 C
(Note 3)
500 mW
DC Voltage Applied to IOUT1 or IOUT2
(Note 4)
ESD Susceptability
b100 mV to VCC
800V
Operating Conditions
Lead Temperature (Soldering 10 sec )
300 C
Temperature Range
DAC1208LCJ DAC1209LCJ
TMIN s TA s TMAX
DAC1210LCJ DAC1230LCJ
DAC1231LCJ DAC1232LCJ
DAC1231LIN DAC1232LIN
b40 C s TA s a85 C
DAC1208LCJ-1 DAC1210LCJ-1
DAC1230LCJ-1 DAC1231LCJ-1
DAC1232LCJ-1 DAC1231LCN
DAC1232LCN DAC1231LCWM
DAC1232LCWM
0 C s TA s a70 C
Range of VCC
4 75 VDC to 16 VDC
Voltage at Any Digital Input
VCC to GND
Electrical Characteristics
VREFe10 000 VDC VCCe11 4 VDC to 15 75 VDC unless otherwise noted Boldface limits apply from TMIN to TMAX (see
Note 13) all other limits TA e TJ e 25 C
Parameter
Conditions
Notes
Typ
(Note 10)
Tested
Limit
(Note 5)
Design
Limit
(Note 6)
Units
Resolution
12 12 12
Bits
Linearity Error
(End Point Linearity)
Zero and Full-Scale
Adjusted
DAC1208 DAC1230
DAC1209 DAC1231
DAC1210 DAC1232
4 7 13
g0 018 g0 018
g0 024 g0 024
g0 050 g0 05
% of FSR
% of FSR
% of FSR
Differential Non-Linearity
Zero and Full-Scale
Adjusted
DAC1208 DAC1230
DAC1209 DAC1231
DAC1210 DAC1232
4 7 13
g0 018 g0 018
g0 024 g0 024
g0 050 g0 05
% of FSR
% of FSR
% of FSR
Monotonicity
4 12 12 12
Bits
Gain Error (Min)
Gain Error (Max)
Using Internal RFb
Vref e g10V g1V
7 b0 1 0 0
7
b0 1
b0 2
% of FSR
% of FSR
Gain Error Tempco
7 g1 3
g6 0 ppm of FS C
Power Supply Rejection
All Digital Inputs
Latched High
7
g3 0
g30
ppm of FSR V
Reference Input Resistance (Min)
Reference Input Resistance (Max)
13
15
15
10 10
20 20
kX
Output Feedthrough Error
VREFe20 Vp-p fe100 kHz
All Data Inputs Latched
Low
9
30
mVp-p
Output Capacitance
Supply Current Drain
All Data Inputs
Latched High
All Data Inputs
Latched Low
IOUT1
IOUT2
IOUT1
IOUT2
13
200
70
70
200
20 25
pF
pF
pF
pF
mA
Output Leakage Current
IOUT1
IOUT2
All Data Inputs Latched
11 13
01
15
15
Low
All Data Inputs Latched
11 13
01
15
15
High
nA
nA
Digital Input Threshold
Digital Input Currents
Low Threshold
High Threshold
Digital Inputs k0 8V
Digital Inputs l2 2V
13
13
13
13
08
22
b200
10
08
22
b200
10
VDC
VDC
mADC
mADC
2


Part Number DAC1232
Description Double-Buffered D to A Converters
Maker National Semiconductor
Total Page 18 Pages
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