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National Semiconductor Electronic Components Datasheet

9338DMQB Datasheet

8-Bit Multiple Port Register

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9338DMQB pdf
9338 DM9338 8-Bit Multiple Port Register
General Description
The DM9338 is an 8-bit multiple port register designed for
high speed random access memory applications where the
ability to simultaneously read and write is desirable A com-
mon use would be as a register bank in a three address
computer Data can be written into any one of the eight bits
and read from any two of the eight bits simultaneously
Connection Diagrams
Dual-In-Line Package
June 1989
TL F 9794 – 1
Order Number 9338DMQB 9338FMQB or DM9338N
See NS Package Number J16A N16E or W16A
Pin Names
A0 – A2
DA
B0 – B2
C0 – C2
CP
SLE
ZB
ZC
Description
Write Address Inputs
Data Input
B Read Address Inputs
C Read Address Inputs
Clock Pulse Input (Active Rising Edge)
Slave Enable Input (Active LOW)
B Output
C Output
FAST and TRI-STATE are registered trademarks of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9794
RRD-B30M115 Printed in U S A



National Semiconductor Electronic Components Datasheet

9338DMQB Datasheet

8-Bit Multiple Port Register

No Preview Available !

9338DMQB pdf
Absolute Maximum Ratings (Note)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage
7V
Input Voltage
5 5V
Operating Free Air Temperature Range
Military
b55 C to a125 C
Commercial
0 C to a70 C
Storage Temperature Range
b65 C to a150 C
Note The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaran-
teed The device should not be operated at these limits The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation
Recommended Operating Conditions
Symbol
VCC
VIH
VIL
IOH
IOL
TA
ts (H)
ts (L)
th (H)
th (L)
ts (H)
ts (L)
th (H)
th (L)
tw (H)
tw (L)
Parameter
Supply Voltage
High Level Input Voltage
Low Level Input Voltage
High Level Output Current
Low Level Output Current
Free Air Operating Temperature
Setup Time HIGH or LOW
DA to CP
Hold Time HIGH or LOW
DA to CP
Setup Time HIGH or LOW
An to CP
Hold Time HIGH or LOW
An to CP
CP Pulse Width HIGH or LOW
Min
45
2
b55
20
12
0
b8 0
10
10
0
0
23
13
Military
Nom
5
Max
55
08
b0 8
16
125
Commercial
Min Nom Max
4 75 5 5 25
2
08
b0 8
16
0 70
20
12
0
b8 0
10
10
0
0
23
13
Units
V
V
V
mA
mA
C
ns
ns
ns
ns
ns
Electrical Characteristics
Over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
VI
VOH
VOL
II
Input Clamp Voltage
High Level Output Voltage
Low Level Output Voltage
Input Current Max
Input Voltage
VCC e Min II e b12 mA
VCC e Min IOH e Max
VIL e Max
VCC e Min IOL e Max
VIH e Min
VCC e Max VI e 5 5V
IIH
High Level Input Current
VCC e Max VI e 2 4V
IIL
Low Level Input Current
VCC e Max VI e 0 4V
IOS Short Circuit
Output Current
VCC e Max
(Note 2)
MIL
COM
ICC Supply Current
VCC e Max
Note 1 All typicals are at VCC e 5V TA e 25 C
Note 2 Not more than one output should be shorted at a time
Min
24
b10
b10
Typ
(Note 1)
34
02
Max
b1 5
04
1
27
b1 1
b70
b70
135
Units
V
V
V
mA
mA
mA
mA
mA
2



National Semiconductor Electronic Components Datasheet

9338DMQB Datasheet

8-Bit Multiple Port Register

No Preview Available !

9338DMQB pdf
Switching Characteristics
VCC e a5 0V TA e a25 C (See Section 1 for waveforms and load configurations)
Symbol
Parameter
9338 (MIL)
CL e 15 pF
DM9338 (COM)
Min Max Min Max
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
Propagation Delay
Bn or Cn to Zn
Propagation Delay
DA to Zn
Propagation Delay
CP to Zn
40 13 40
35 18 35
45 25 45
50 25 50
35 18 35
30 13 30
Units
ns
ns
ns
Functional Description
The 9338 8-bit multiple port register can be considered a 1-
bit slice of eight high speed working registers Data can be
written into any one and read from any two of the eight
locations simultaneously Master slave operation eliminates
all race problems associated with simultaneous read write
activity from the same location When the clock input (CP) is
LOW data applied to the data input line (DA) enters the
selected master This selection is accomplished by coding
the three write input select lines (A0–A2) appropriately
Data is stored synchronously with the rising edge of the
clock pulse
The information for each of the two slaved (output) latches
is selected by two sets of read address inputs (B0 – B2 and
C0 – C2) The information enters the slave while the clock is
HIGH and is stored while the clock is LOW If Slave Enable
is LOW (SLE) the slave latches are continuously enabled
The signals are available on the output pins (ZB and ZC)
The input bit selection and the two output bit selections can
be accomplished independently or simultaneously The data
flows into the device is demultiplexed according to the state
of the write address lines and is clocked into the selected
latch The eight latches function as masters and store the
input data The two output latches are slaves and hold the
data during the read operation The state of each slave is
determined by the state of the master selected by its associ-
ated set of read address inputs
The method of parallel expansion is shown in Figure a One
9338 is needed for each bit of the required word length The
read and write input lines should be connected in common
on all of the devices This register configuration provides
two words of n-bits each at one time where n devices are
connected in parallel
Logic Symbol
VCC e Pin 16
GND e Pin 8
TL F 9794 – 2
FIGURE a Parallel Expansion
3
TL F 9794 – 4




Part Number 9338DMQB
Description 8-Bit Multiple Port Register
Maker National Semiconductor
Total Page 6 Pages
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