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National Semiconductor Electronic Components Datasheet

74F175PC Datasheet

Quad D Flip-Flop

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74F175PC pdf
November 1994
54F 74F175 Quad D Flip-Flop
General Description
The ’F175 is a high-speed quad D flip-flop The device is
useful for general flip-flop requirements where clock and
clear inputs are common The information on the D inputs is
stored during the LOW-to-HIGH clock transition Both true
and complemented outputs of each flip-flop are provided A
Master Reset input resets all flip-flops independent of the
Clock or D inputs LOW
Features
Y Edge-triggered D-type inputs
Y Buffered positive edge-triggered clock
Y Asynchronous common reset
Y True and complement output
Y Guaranteed 4000V minimum ESD protection
Commercial
74F175PC
74F175SC (Note 1)
74F175SJ (Note 1)
Military
54F175DM (Note 2)
54F175FM (Note 2)
54F175LM (Note 2)
Package
Number
N16E
J16A
M16A
M16D
W16A
E20A
Package Description
16-Lead (0 300 Wide) Molded Dual-In-Line
16-Lead Ceramic Dual-In-Line
16-Lead (0 150 Wide) Molded Small Outline JEDEC
16-Lead (0 300 Wide) Molded Small Outline EIAJ
16-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier Type C
Note 1 Devices also available in 13 reel Use suffix e SCX and SJX
Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB
Logic Symbols
Connection Diagrams
IEEE IEC
Pin Assignment for
DIP SOIC and Flatpak
Pin Assignment
for LCC
TL F 9490–5
TL F 9490 – 1
TL F 9490 – 2
TL F 9490 – 3
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9490
RRD-B30M75 Printed in U S A



National Semiconductor Electronic Components Datasheet

74F175PC Datasheet

Quad D Flip-Flop

No Preview Available !

74F175PC pdf
Unit Loading Fan Out
Pin Names
D0 – D3
CP
MR
Q0 – Q3
Q0 – Q3
Description
Data Inputs
Clock Pulse Input (Active Rising Edge)
Master Reset Input (Active LOW)
True Outputs
Complement Outputs
54F 74F
UL
HIGH LOW
10 10
10 10
10 10
50 33 3
50 33 3
Input IIH IIL
Output IOH IOL
20 mA b0 6 mA
20 mA b0 6 mA
20 mA b0 6 mA
b1 mA 20 mA
b1 mA 20 mA
Functional Description
The ’F175 consists of four edge-triggered D flip-flops with
individual D inputs and Q and Q outputs The Clock and
Master Reset are common The four flip-flops will store the
state of their individual D inputs on the LOW-to-HIGH clock
(CP) transition causing individual Q and Q outputs to follow
A LOW input on the Master Reset (MR) will force all Q out-
puts LOW and Q outputs HIGH independent of Clock or
Data inputs The ’F175 is useful for general logic applica-
tions where a common Master Reset and Clock are accept-
able
Truth Table
Inputs
MR CP Dn
L XX
H LH
H LL
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
L e LOW-to-HIGH Clock Transition
Logic Diagram
Outputs
Qn Qn
LH
HL
LH
TL F 9490 – 4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
2



National Semiconductor Electronic Components Datasheet

74F175PC Datasheet

Quad D Flip-Flop

No Preview Available !

74F175PC pdf
Absolute Maximum Ratings (Note 1)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Storage Temperature
b65 C to a150 C
Ambient Temperature under Bias
b55 C to a125 C
Junction Temperature under Bias
Plastic
b55 C to a175 C
b55 C to a150 C
VCC Pin Potential to
Ground Pin
b0 5V to a7 0V
Input Voltage (Note 2)
b0 5V to a7 0V
Input Current (Note 2)
b30 mA to a5 0 mA
Voltage Applied to Output
in HIGH State (with VCC e 0V)
Standard Output
TRI-STATE Output
b0 5V to VCC
b0 5V to a5 5V
Current Applied to Output
in LOW State (Max)
twice the rated IOL (mA)
Note 1 Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired Functional operation under
these conditions is not implied
Note 2 Either voltage limit or current limit is sufficient to protect inputs
Recommended Operating
Conditions
Free Air Ambient Temperature
Military
Commercial
b55 C to a125 C
0 C to a70 C
Supply Voltage
Military
Commercial
a4 5V to a5 5V
a4 5V to a5 5V
DC Electrical Characteristics
Symbol
VIH
VIL
VCD
VOH
VOL
IIH
IBVI
ICEX
VID
IOD
IIL
IOS
ICC
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH
Voltage
Output LOW
Voltage
Input HIGH
Current
54F 10% VCC
74F 10% VCC
74F 5% VCC
54F 10% VCC
74F 10% VCC
54F
74F
Input HIGH Current 54F
Breakdown Test
74F
Output HIGH
Leakage Current
54F
74F
Input Leakage
Test
74F
Output Leakage
Circuit Current
74F
Input LOW Current
Output Short-Circuit Current
Power Supply Current
54F 74F
Min Typ Max
20
08
b1 2
25
25
27
05
05
20 0
50
100
70
250
50
4 75
3 75
b60
b0 6
b150
22 5 34 0
Units
V
V
V
V
V
mA
mA
mA
V
mA
mA
mA
mA
VCC
Min
Min
Min
Max
Max
Max
00
00
Max
Max
Max
Conditions
Recognized as a HIGH Signal
Recognized as a LOW Signal
IIN e b18 mA
IOH e b1 mA
IOH e b1 mA
IOH e b1 mA
IOL e 20 mA
IOL e 20 mA
VIN e 2 7V
VIN e 7 0V
VOUT e VCC
IID e 1 9 mA
All Other Pins Grounded
VIOD e 150 mV
All Other Pins Grounded
VIN e 0 5V
VOUT e 0V
CP e L
Dn e MR e HIGH
3




Part Number 74F175PC
Description Quad D Flip-Flop
Maker National Semiconductor
Total Page 8 Pages
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