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NXP Semiconductors Electronic Components Datasheet

VT16543ADGG Datasheet

3.3V LVT 16-bit registered transceiver 3-State

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VT16543ADGG pdf
INTEGRATED CIRCUITS
74LVT16543A
3.3V LVT 16-bit registered transceiver
(3-State)
Product specification
Supersedes data of 19
IC23 Data Handbook
1998 Feb 19
Philips
Semiconductors


NXP Semiconductors Electronic Components Datasheet

VT16543ADGG Datasheet

3.3V LVT 16-bit registered transceiver 3-State

No Preview Available !

VT16543ADGG pdf
Philips Semiconductors
3.3V 16-bit registered transceiver (3-State)
Product specification
74LVT16543A
FEATURES
16-bit universal bus interface
3-State buffers
Output capability: +64mA/-32mA
TTL input and output switching levels
Input and output interface capability to systems at 5V supply
Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
Live insertion/extraction permitted
Power-up 3-State
Power-up reset
No bus current loading when output is tied to 5V bus
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION
The 74LVT16543A is a high-performance BiCMOS product
designed for VCC operation at 3.3V. The device can be used as two
8-bit transceivers or one 16-bit transceiver.
The 74LVT16543A contains two sets of eight D-type latches, with
separate control pins for each set. Using data flow from A to B as an
example, when the A-to-B Enable (nEAB) input and the A-to-B Latch
Enable (nLEAB) input are Low, the A-to-B path is transparent.
A subsequent Low-to-High transition of the nLEAB signal puts the A
data into the latches where it is stored and the B outputs no longer
change with the A inputs. With nEAB and nOEAB both Low, the
3-State B output buffers are active and display the data present at
the outputs of the A latches.
Control of data flow from B to A is similar, but using the nEBA,
nLEBA, and nOEBA inputs.
Active bus-hold circuitry is provided to hold unused or floating data
inputs at a valid logic level.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
tPLH
tPHL
CIN
CI/O
ICCZ
Propagation delay
nAx to nBx or nBx to nAx
Input capacitance control pins
I/O pin capacitance
Total supply current
CONDITIONS
Tamb = 25°C; GND = 0V
CL = 50pF;
VCC = 3.3V
VI = 0V or 3.0V
Outputs disabled; VI/O = 0V or 3.0V
Outputs disabled; VCC = 3.6V
TYPICAL
2.2
3
9
70
UNIT
ns
pF
pF
µA
ORDERING INFORMATION
PACKAGES
56-Pin Plastic SSOP Type III
56-Pin Plastic TSSOP Type II
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
–40°C to +85°C
74LVT16543A DL
–40°C to +85°C
74LVT16543A DGG
NORTH AMERICA
VT16543A DL
VT16543A DGG
DWG NUMBER
SOT371-1
SOT364-1
LOGIC SYMBOL (IEEE/IEC)
56 1EN3 (BA)
54 G1
55 1C5
1 2EN4 (AB)
3 G2
2 2C6
29 7EN9 (BA)
31 G7
30 7C11
28 8EN10 (AB)
26 G8
27 8C12
5
3 5D
52 15
9 11 D
6D 4
12 D
10
6 51 16
8 49 17
9 48 19
10 47 20
12 45 21
13 44 23
14 43 24
42
41
40
38
37
36
34
33
SW00151
1998 Feb 19
2 853–1764 18986


Part Number VT16543ADGG
Description 3.3V LVT 16-bit registered transceiver 3-State
Maker NXP
Total Page 12 Pages
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