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NXP Semiconductors Electronic Components Datasheet

VT16500ADL Datasheet

3.3V 18-bit universal bus transceiver 3-State

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VT16500ADL pdf
INTEGRATED CIRCUITS
74LVT16500A
3.3V 18-bit universal bus transceiver
(3-State)
Product specification
Supersedes data of 1997 Jun 12
IC23 Data Handbook
1998 Feb 19
Philips
Semiconductors


NXP Semiconductors Electronic Components Datasheet

VT16500ADL Datasheet

3.3V 18-bit universal bus transceiver 3-State

No Preview Available !

VT16500ADL pdf
Philips Semiconductors
3.3V 18-bit universal bus transceiver (3-State)
Product specification
74LVT16500A
FEATURES
18-bit bidirectional bus interface
3-State buffers
Output capability: +64mA/-32mA
TTL input and output switching levels
Input and output interface capability to systems at 5V supply
Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
Live insertion/extraction permitted
Power-up reset
Power-up 3-State
No bus current loading when output is tied to 5V bus
Negative edge-triggered clock inputs
Latch-up protection exceeds 500mA per JEDEC JC40.2 Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION
The 74LVT16500A is a high-performance BiCMOS product
designed for VCC operation at 3.3V.
This device is an 18-bit universal transceiver featuring non-inverting
3-State bus compatible outputs in both send and receive directions.
Data flow in each direction is controlled by output enable (OEAB and
OEBA), latch enable (LEAB and LEBA), and clock (CPAB and
CPBA) inputs. For A-to-B data flow, the device operates in the
transparent mode when LEAB is High. When LEAB is Low, the A
data is latched if CPAB is held at a High or Low logic level. If LEAB
is Low, the A-bus data is stored in the latch/flip-flop on the
High-to-Low transition of CPAB. When OEAB is High, the outputs
are active. When OEAB is Low, the outputs are in the
high-impedance state.
Data flow for B-to-A is similar to that of A-to-B but uses OEBA,
LEBA and CPBA. The output enables are complimentary (OEAB is
active High, and OEBA is active Low).
Active bus-hold circuitry is provided to hold unused or floating data
inputs at a valid logic level.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
tPLH
tPHL
CIN
CI/O
ICCZ
Propagation delay
An to Bn or Bn to An
Input capacitance (Control pins)
I/O pin capacitance
Total supply current
CONDITIONS
Tamb = 25°C
CL = 50pF;
VCC = 3.3V
VI = 0V or 3.0V
Outputs disabled; VI/O = 0V or 3.0V
Outputs disabled; VCC = 3.6V
TYPICAL
1.9
3
9
70
UNIT
ns
pF
pF
µA
ORDERING INFORMATION
PACKAGES
56-Pin Plastic SSOP Type III
56-Pin Plastic TSSOP Type II
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
–40°C to +85°C
74LVT16500A DL
–40°C to +85°C
74LVT16500A DGG
NORTH AMERICA
VT16500A DL
VT16500A DGG
DWG NUMBER
SOT371-1
SOT364-1
PIN DESCRIPTION
PIN NUMBER
1
27
2, 28
55,30
3, 5, 6, 8, 9, 10, 12, 13, 14, 15,
16, 17, 19, 20, 21, 23, 24, 26
54, 52, 51, 49, 48, 47, 45, 44, 43,
42, 41, 40, 38, 37, 36, 34, 33, 31
4, 11, 18, 25, 32, 39, 46, 53
7, 22, 35, 50
SYMBOL
OEAB
OEBA
LEAB/LEBA
CPAB/CPBA
A0-A17
B0-B17
GND
VCC
NAME AND FUNCTION
A-to-B Output enable input
B-to-A Output enable input (active low)
A-to-B/B-to-A Latch enable input
A-to-B/B-to-A Clock input (active falling edge)
Data inputs/outputs (A side)
Data inputs/outputs (B side)
Ground (0V)
Positive supply voltage
1998 Feb 19
2 853-1789 18989


Part Number VT16500ADL
Description 3.3V 18-bit universal bus transceiver 3-State
Maker NXP
Total Page 14 Pages
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