Quad 2-input NAND Schmitt trigger
Rev. 01 — 15 December 2006
Product data sheet
1. General description
The 74LVC132A is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families.
The 74LVC132A provides four 2-input NAND gates with Schmitt trigger inputs. It is
capable of transforming slowly changing input signals into sharply deﬁned, jitter-free
The inputs switch at different points for positive and negative-going signals. The difference
between the positive voltage VT+ and the negative voltage VT− is deﬁned as the input
hysteresis voltage VH.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these
devices as translators in mixed 3.3 V and 5 V environment.
s Wide supply voltage range from 2.3 V to 3.6 V
s 5 V tolerant inputs for interfacing with 5 V logic
s CMOS low power consumption
s Direct interface with TTL levels
s Unlimited rise and fall times
s Inputs accept voltages up to 5.5 V
s Complies with JEDEC standard JESD8-B/JESD36
s ESD protection:
x HBM JESD22-A114-D exceeds 2000 V
x MM JESD22-A115-A exceeds 200 V
x CDM JESD22-C101-C exceeds 1000 V
s Speciﬁed from −40 °C to +85 °C and −40 °C to +125 °C
s Wave and pulse shaper
s Astable multivibrator
s Monostable multivibrator.