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NXP Semiconductors Electronic Components Datasheet

74ABT543A Datasheet

Octal latched transceiver with dual enable 3-State

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74ABT543A pdf
INTEGRATED CIRCUITS
74ABT543A
Octal latched transceiver
with dual enable (3-State)
Product specification
Supersedes data of 1995 Apr 19
IC23 Data Handbook
Philips
Semiconductors
1998 Sep 24


NXP Semiconductors Electronic Components Datasheet

74ABT543A Datasheet

Octal latched transceiver with dual enable 3-State

No Preview Available !

74ABT543A pdf
Philips Semiconductors
Octal latched transceiver with dual enable
(3-State)
Product specification
74ABT543A
FEATURES
Combines 74ABT245 and 74ABT373 type functions in one device
8-bit octal transceiver with D-type latch
Back-to-back registers for storage
Separate controls for data flow in each direction
Output capability: +64mA/–32mA
Live insertion/extraction permitted
Power-up 3-State
Power-up reset
Latch-up protection exceeds 500mA per Jedec Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
DESCRIPTION
The 74ABT543A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT543A Octal Registered Transceiver contains two sets of
D-type latches for temporary storage of data flowing in either
direction. Separate Latch Enable (LEAB, LEBA) and Output Enable
(OEAB, OEBA) inputs are provided for each register to permit
independent control of data transfer in either direction. The outputs
are guaranteed to sink 64mA.
FUNCTIONAL DESCRIPTION
The 74ABT543A contains two sets of eight D-type latches, with
separate control pins for each set. Using data flow from A to B as an
example, when the A-to-B Enable (EAB) input and the A-to-B Latch
Enable (LEAB) input are Low the A-to-B path is transparent. A
subsequent Low-to-High transition of the LEAB signal puts the A
data into the latches where it is stored and the B outputs no longer
change with the A inputs. With EAB and OEAB both Low, the
3-State B output buffers are active and display the data present at
the outputs of the A latches.
Control of data flow from B to A is similar, but using the EBA, LEBA,
and OEBA inputs.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
tPLH
tPHL
CIN
CI/O
ICCZ
Propagation delay
An to Bn or Bn to An
Input capacitance
I/O capacitance
Total supply current
CONDITIONS
Tamb = 25°C; GND = 0V
CL = 50pF; VCC = 5V
VI = 0V or VCC
Outputs disabled;
VO = 0V or VCC
Outputs disabled; VCC =5.5V
TYPICAL
2.9
3.6
4
7
110
UNIT
ns
pF
pF
µA
ORDERING INFORMATION
PACKAGES
24-Pin Plastic DIP
24-Pin plastic SO
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74ABT543A N
74ABT543A D
74ABT543A DB
74ABT543A PW
NORTH AMERICA
74ABT543A N
74ABT543A D
74ABT543A DB
7ABT543APW DH
DWG NUMBER
SOT222-1
SOT137-1
SOT340-1
SOT355-1
PIN CONFIGURATION
LEBA 1
OEBA 2
A0 3
A1 4
A2 5
A3 6
A4 7
A5 8
A6 9
A7 10
EAB 11
GND 12
24 VCC
23 EBA
22 B0
21 B1
20 B2
19 B3
18 B4
17 B5
16 B6
15 B7
14 LEAB
13 OEAB
SA00168
PIN DESCRIPTION
PIN NUMBER SYMBOL
FUNCTION
14, 1
11, 23
LEAB / LEBA
EAB / EBA
A to B / B to A Latch Enable
input (active-Low)
A to B / B to A Enable input
(active-Low)
13, 2
3, 4, 5, 6,
7, 8, 9, 10
22, 21, 20, 19,
18, 17, 16, 15
12
OEAB / OEBA
A to B / B to A Output Enable
input (active-Low)
A0 – A7 Port A, 3-State outputs
B0 – B7
GND
Port B, 3-State outputs
Ground (0V)
24 VCC Positive supply voltage
1998 Sep 24
2 853-1794 20080


Part Number 74ABT543A
Description Octal latched transceiver with dual enable 3-State
Maker NXP
Total Page 12 Pages
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