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MST9883 Datasheet Preview

MST9883 Datasheet

Triple Video A/D Converter

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MST9883 pdf
MST9883
110 MSPS/140 MSPS
Triple Video A/D Converter with Clamps & Pixel Clock Synthesizer
FEATURES OVERVIEW
u Triple ADC with 12 - 140 MHz Sampling Rate
u Integrated line locked PLL generates pixel clock
from HSYNC
u Integrated 5-bit pixel clock phase adjustment
for precise sample timing control
u Integrated clamp with timing generator
u Integrated Brightness & Contrast controls
u Integrated precision voltage reference
u Compatible with VGA through SXGA RGB
graphics signals
u Pin Compatible with AD9883A
u Serial port programming interface
u Mid-Scale Clamping
u Fully Sync Processing
u 4:2:2 Output Format Mode
BLOCK DIAGRAM
DESCRIPTION
Most flat-panel monitors and projectors require a digital graphics input in order to accurately scale and display
graphics. The huge installed base of computers with analog video graphics interfaces necessitates the use of a
graphics digitizer to re-digitize the analog RGB signal before further processing.
u The MST9883 is a fully integrated analog interface for digitizing high-resolution RGB graphics signals from PCs
and workstations. With a sampling rate capability of up to 140 MHz, it can accurately support display
resolutions up to 1280x1024 (SXGA) at 75 Hz. The clamped input circuits provide sufficient bandwidth to
accurately digitize each pixel.
u The MST9883 provides a high performance highly integrated solution to support the digitization process,
including the ADCs, a voltage reference, a PLL to generate the pixel sampling clock from HSYNC, clamping
circuits, and programmable offset and gain circuits to provide brightness and contrast controls.
u When the COAST signal is asserted, the PLL will maintain its output frequency when HSYNC pulses are absent,
such as during the VSYNC period in some systems.
u A 32-step programmable phase adjustment control (0-360 deg) is provided for the pixel sampling clock to
adjust for the difference between the HSYNC edge and RGB pixel edge timing.
u The MST9883 can send output data through one 24-bit port at the pixel clock rate.
Version 1.6
-1-
Copyright © 2003 MStar Semiconductor, Inc. All rights reserved.
Confidential information
3/7/2003



Mstar
Mstar

MST9883 Datasheet Preview

MST9883 Datasheet

Triple Video A/D Converter

No Preview Available !

MST9883 pdf
MST9883
110 MSPS/140 MSPS
Triple Video A/D Converter with Clamps & Pixel Clock Synthesizer
REGISTER SET
Register Map
Function
Name
ADDR
Bit Definition
MSB
REVID
00H --
--
PLLDIVM 01H N11
N10
PLLDIVL
02H N3
N2
PLLGAIN 03H VCO1
VCO0
PHASE
04H PA4
PA3
CLPDLY
05H CP7
CP6
CLPDUR
06H CD7
CD6
HOP
07H HOP7
HOP6
REDGAIN 08H RG7
RG6
GRNGAIN 09H GG7
GG6
BLUGAIN 0AH BG7
BG6
REDOFFST 0BH RO7
RO6
GRNOFFST 0CH GO7
GO6
BLUOFFST 0DH BO7
BO6
SYNCTRL 0EH HPO
HSPOL
GENCTRL 0FH EXTCLMP CLAMPOL
SOGMIDC 10H SOG4
SOG3
SYNSEPT 11H SST7
SST6
PRECO
12H PRC7
PRC6
POSTCO
13H POC7
POC6
SYNCD(RO) 14H HSD
AHS
DOUTF
15H --
--
RESERVED 16H --
--
STATUS(RO) 17H LOCK
STAT6
RESERVED 18H --
--
--
N9
N1
CP2
PA2
CP5
CD5
HOP5
RG5
GG5
BG5
RO5
GO5
BO5
HSOUTPOL
COSEL
SOG2
SST5
PRC5
POC5
IHSPD
--
--
STAT5
--
--
N8
N0
CP1
PA1
CP4
CD4
HOP4
RG4
GG4
BG4
RO4
GO4
BO4
AHO
CPOLOV
SOG1
SST4
PRC4
POC4
VSD
--
--
STAT4
--
--
N7
--
CP0
PA0
CP3
CD3
HOP3
RG3
GG3
BG3
RO3
GO3
BO3
AHS
CSTPOL
SOG0
SST3
PRC3
POC3
AVS
UVI
--
STAT3
--
--
N6
--
--
--
CP2
CD2
HOP2
RG2
GG2
BG2
RO2
GO2
BO2
VOI
SEEK
R_SEL
SST2
PRC2
POC2
OVPD
--
--
STAT2
--
--
N5
--
--
--
CP1
CD1
HOP1
RG1
GG1
BG1
RO1
GO1
BO1
AVO
PWRN
G_SEL
SST1
PRC1
POC1
SOGD
V422
--
STAT1
--
LSB
0
N4
--
--
--
CP0
CD0
HOP0
RG0
GG0
BG0
RO0
GO0
BO0
AVS
--
B_SEL
SST0
PRC0
POC0
ICPD
--
--
STAT0
--
Default
00xh
69xh
D0xh
48xh
40xh
05xh
05xh
20xh
80xh
80xh
80xh
80xh
80xh
80xh
40xh
4Exh
B8xh
20xh
00xh
00xh
--
02xh
--
--
--
Version 1.6
-2-
Copyright © 2003 MStar Semiconductor, Inc. All rights reserved.
Confidential information
3/7/2003


Part Number MST9883
Description Triple Video A/D Converter
Maker Mstar
Total Page 19 Pages
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