| Description | MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual J-K Flip-Flop with Reset High–Performance Silicon–Gate CMOS The MC74HC107 is identical in pinout to the LS107. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Each flip flops negative edge clocked and has an active–low asynchronous reset. The HC107 is identical in function to th... |
| Features |
4 13 8 9 11 10 PIN 14 = VCC PIN 7 = GND Reset L H H H H H H H 6 Q2 2 Q1 Q1 3 Q1 Q1 K1 Q2 Q2 GND 5 Q2 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC RESET 1 CLOCK 1 K2 RESET 2 CLOCK 2 J2
FUNCTION TABLE
Inputs Clock X J X L L H H X X X K X L H L H X X X Outputs Q Q L H No Change L H H L Toggle No Change No Change No Change
L H
10/95
© Motorola, Inc. 1995
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| Datasheet |
 MC75HC107 Datasheet - 171.35KB |
