| Description | Pixel data input to the first line delay. [most significant byte in 16 bit mode] Pixel data input to the second group of line delays. [least significant byte in 16bit mode]. Alternatively an output from the last line delay when the appropriate mode bit is set. The first line delay in the first group is bypassed when this input is active. (High). No internal pull up. Resets the line delay address p... |
| Features |
I I I I I I I I I The PDSP16488A is a fully compatible replacement for the PDSP16488 8 or 16 bit pixels with rates up to 40 MHz Window sizes up to 8 x 8 with a single device Eight internal line delays Supports interlace and frame to frame operations Coefficients supplied from an EPROM or remote host Expandable in both X and Y for larger windows Gai...
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| Datasheet |
 PDSP16488AMA Datasheet - 237.51KB |
