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Intersil Electronic Components Datasheet

ICL7109 Datasheet

12-Bit/ Microprocessor- Compatible A/D Converter

No Preview Available !

ICL7109 pdf
November 2000
Features
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Description
ICL7109
12-Bit, Microprocessor-
Compatible A/D Converter
• 12-Bit Binary (Plus Polarity and Over-Range) Dual
Slope Integrating Analog-to-Digital Converter
• Byte-Organized, TTL Compatible Three-State Outputs
and UART Handshake Mode for Simple Parallel or
Serial Interfacing to Microprocessor Systems
• RUN/HOLD Input and STATUS Output Can Be Used to
Monitor and Control Conversion Timing
• True Differential Input and Differential Reference
• Low Noise (Typ) . . . . . . . . . . . . . . . . . . . . . . . . 15µVP-P
• Input Current (Typ) . . . . . . . . . . . . . . . . . . . . . . . . . .1pA
• Operates At Up to 30 Conversions/s
• On-Chip Oscillator Operates with Inexpensive 3.58MHz
TV Crystal Giving 7.5 Conversions/s for 60Hz Rejec-
tion. May Also Be Used with An RC Network Oscillator
for Other Clock Frequencies
The ICL7109 is a high performance, CMOS, low power
integrating A/D converter designed to easily interface with
microprocessors.
The output data (12 bits, polarity and over-range) may be
directly accessed under control of two byte enable inputs and a
chip select input for a single parallel bus interface. A UART
handshake mode is provided to allow the ICL7109 to work with
industry-standard UARTs in providing serial data transmission.
The RUN/HOLD input and STATUS output allow monitoring
and control of conversion timing.
The ICL7109 provides the user with the high accuracy, low
noise, low drift versatility and economy of the dual-slope
integrating A/D converter. Features like true differential input
and reference, drift of less than 1µV/oC, maximum input bias
current of 10pA, and typical power consumption of 20mW
make the ICL7109 an attractive per-channel alternative to
analog multiplexing for many data acquisition applications.
Part Number Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
ICL7109MDL
-55 to 125 40 Ld SBDIP
ICL7109IDL
-25 to 85 40 Ld SBDIP
ICL7109IJL
-25 to 85 40 Ld CERDIP
ICL7109CPL
0 to 70 40 Ld PDIP
ICL7109MDL/883B -55 to 125 40 Ld SBDIP
ICL7109IPL
-25 to 85 40 Ld PDIP
PKG.
NO.
D40.6
D40.6
F40.6
E40.6
D40.6
E40.6
Pinout
ICL7109
(CERDIP, PDIP, SBDIP)
TOP VIEW
GND 1
STATUS 2
POL 3
OR 4
B12 5
B11 6
B10 7
B9 8
B8 9
B7 10
B6 11
B5 12
B4 13
B3 14
B2 15
B1 16
TEST 17
LBEN 18
HBEN 19
CE/LOAD 20
40 V+
39 REF IN -
38 REF CAP-
37 REF CAP+
36 REF IN+
35 IN HI
34 IN LO
33 COMMON
32 INT
31 AZ
30 BUF
29 REF OUT
28 V-
27 SEND
26 RUN/HOLD
25 BUF OSC OUT
24 OSC SEL
23 OSC OUT
22 OSC IN
21 MODE
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
1
File Number 3092.2



Intersil Electronic Components Datasheet

ICL7109 Datasheet

12-Bit/ Microprocessor- Compatible A/D Converter

No Preview Available !

ICL7109 pdf
ICL7109
Absolute Maximum Ratings
Positive Supply Voltage (GND to V+). . . . . . . . . . . . . . . . . . . . +6.0V
Negative Supply Voltage (GND to V-) . . . . . . . . . . . . . . . . . . . . . -9V
Analog Input Voltage (Either Input) (Note 1) . . . . . . . . . . . . V+ to V-
Reference Input Voltage (Either Input) (Note 1) . . . . . . . . . . V+ to V-
Digital Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V+) +0.3V
Pins 2-27 (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND -0.3V
Operating Conditions
Temperature Range
M Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
I Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25oC to 85oC
C Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 75oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W) θJC (oC/W)
SBDIP Package. . . . . . . . . . . . . . . . . . . .
60
20
CERDIP Package . . . . . . . . . . . . . . . . . .
55
18
PDIP Package . . . . . . . . . . . . . . . . . . . . .
50
N/A
Maximum Junction Temperature (PDIP Package) . . . . . . . . . 150oC
Maximum Junction Temperature (CERDIP Package). . . . . . . 175oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s Max). . . . . . . . . 300oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Analog Electrical Specifications V+ = +5V, V- = -5V, GND = 0V, TA = 25oC, fCLK = 3.58MHz,
Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
SYSTEM PERFORMANCE
Oscillator Output Current
High, OOH
Low, OOL
Buffered Oscillator Output Current
High, BOOH
Low, BOOL
Zero Input Reading
Ratiometric Error
Non-Linearity
VOUT = 2.5V
VOUT = 2.5V
VOUT = 2.5V
VOUT = 2.5V
VIN = 0.0000V, VREF = 204.8mV
VlN = VREF, VREF = 204.8mV (Note 7)
Full Scale = 409.6mV to 2.048mV
Maximum Deviation from Best Straight Line Fit, Over
Full Operating Temperature Range (Notes 4 and 6)
Rollover Error
Linearity
Full Scale = 409.6mV to 2.048V
Difference in Reading for Equal Positive and Negative
Inputs Near Full Scale (Notes 5 and 6), R1 = 0
Full-Scale = 200mV or Full Scale = 2V Maximum
Deviation from Best Straight Line Fit (Note 4)
Common Mode Rejection Ratio, CMRR VCM = ±1V, VIN = 0V, Full Scale = 409.6mV
Input Common Mode Range, VCMR Input HI, Input LO, Common (Note 4)
Noise, eN
Leakage Current Input, IILK
ICL7109CPL
ICL7109IDL
ICL7109MDL
Zero Reading Drift
VIN = 0V, Full-Scale = 409.6mV
(Peak-to-Peak Value Not Exceeded 95% of Time)
VlN = 0V, All Devices at 25oC (Note 4)
0oC to 70oC (Note 4)
-25oC to 85oC (Note 4)
-55oC to 125oC
VlN = 0V, R1 - 0(Note 4)
MIN TYP MAX
-1-
- 1.5 -
-2-
-5-
-0000 ±0000 +0000
-3 - 0
-1 ±0.2 +1
-1 ±0.2 +1
- ±0.2 ±1
- 50 -
(V-) - (V+)
+2.0 -2.0
- 15 -
- 1 10
- 20 100
- 100 250
- 2 100
- 0.2 1
UNIT
mA
mA
mA
mA
Counts
Counts
Counts
Counts
Counts
µV/V
V
µV
pA
pA
pA
nA
µV/oC
2



Intersil Electronic Components Datasheet

ICL7109 Datasheet

12-Bit/ Microprocessor- Compatible A/D Converter

No Preview Available !

ICL7109 pdf
ICL7109
Analog Electrical Specifications V+ = +5V, V- = -5V, GND = 0V, TA = 25oC, fCLK = 3.58MHz,
Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
MIN TYP MAX
UNIT
Scale Factor Temperature Coefficient VIN = 408.9mV = > 77708 Reading Ext. Ref. 0ppm/oC
-
1
5 ppm/oC
(Note 4)
REFERENCE VOLTAGE
Ref Out Voltage, VREF
Ref Out Temperature Coefficient
Referred to V+, 25kBetween V+ and REF OUT
25kBetween V+ and REF OUT (Note 4)
-2.4 -2.8 -3.2
V
- 80 - ppm/oC
POWER SUPPLY CHARACTERISTICS
Supply Current V+ to GND, I+
Supply Current V+ to V-, ISUPP
VIN = 0V, Crystal Osc 3.58MHz Test Circuit
Pins 2 - 21, 25, 26, 27, 29; Open
- 700 1500
- 700 1500
µA
µA
Digital Electrical Specifications V+ = +5V, V- = -5V, GND = 0V, TA = 25oC, Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
MIN TYP MAX
UNIT
DIGITAL OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Output Leakage Current
IOUT = 100µA Pins 2 - 16, 18, 19, 20
IOUT = 1.6mA Pins 2 - 16, 18, 19, 20
Pins 3 - 16 High Impedance
3.5 4.3
-
- ±0.20 ±0.40
- ±0.01 ±1
V
V
µA
Control I/O Pullup Current
Pins 18, 19, 20 VOUT = V+ -3V MODE Input at GND - 5 -
(Note 4)
µA
Control I/O Loading
HBEN Pin 19 LBEN Pin 18 (Note 4)
- 50
pF
DIGITAL INPUTS
Input High Voltage, VIH
Input Low Voltage, VIL
Input Pull-Up Current
Input Pull-Up Current
Input Pull-Down Current
TIMING CHARACTERISTICS
Pins 18 - 21, 26, 27 Referred to GND
Pins 18 - 21, 26, 27 Referred to GND
Pins 26, 27 VOUT = (V+) -3V
Pins 17, 24 VOUT = (V+) -3V
Pin 21 VOUT = GND +3V
3.0 -
--
-5
- 25
-5
-
1
-
-
-
V
V
µA
µA
µA
MODE Input Pulse Width, tW
(Note 4)
50 -
-
ns
NOTES:
1. Input voltages may exceed the supply voltages provided the input current is limited to ±100µA.
2. Due to the SCR structure inherent in the process used to fabricate these devices, connecting any digital inputs or outputs to voltages
greater than V+ or less than GND may cause destructive device latchup. For this reason it is recommended that no inputs from sources
other than the same power supply be applied to the ICL7109 before its power supply is established, and that in multiple supply systems
the supply to the ICL7109 be activated first.
3. This limit refers to that of the package and will not be obtained during normal operation.
4. This parameter is not production tested, but is guaranteed by design.
5. Roll-over error for TA = -55oC to 125oC is ±10 counts (Max).
6. A full scale voltage of 2.048V is used because a full scale voltage of 4.096V exceeds the devices Common Mode Voltage Range.
7. For CERDIP package the Ratiometric error can be -4 (Min).
3




Part Number ICL7109
Description 12-Bit/ Microprocessor- Compatible A/D Converter
Maker Intersil
Total Page 25 Pages
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