LOW SKEW, 1-TO-12 LVCMOS/LVTTL CLOCK MULTIPLIER/
ZERO DELAY BUFFER
The ICS87972I-147 is a low skew, LVCMOS/LVTTL
Clock Generator and a member of the HiPerClockS™
family of High Performance Clock Solutions from
ICS. The ICS87972I-147 has three selectable inputs
and provides 14 LVCMOS/LVTTL outputs.
The ICS87972I-147 is a highly flexible device. Using the crystal
oscillator input, it can be used to generate clocks for a system. All
of these clocks can be the same frequency or the device can be
configured to generate up to three different frequencies among the
three output banks. Using one of the single ended inputs, the
ICS87972I-147 can be used as a zero delay buffer/multiplier/
divider in clock distribution applications.
The three output banks and feedback output each have their own
output dividers which allows the device to generate a multitude of
different bank frequency ratios and output-to-input frequency
ratios. In addition, 2 outputs in Bank C (QC2, QC3) can be select-
ed to be inverting or non-inverting. The output frequency range is
10MHz to 150MHz. Input frequency range is 6MHz to 150MHz.
The ICS87972I-147 also has a QSYNC output which can be used
or system synchronization purposes. It monitors Bank A and Bank
C outputs and goes low one period of the faster clock prior to
coincident rising edges of Bank A and Bank C clocks. QSYNC
then goes high again when the coincident rising edges of Bank A
and Bank C occur. This feature is used primarily in applications
where Bank A and Bank C are running at different frequencies,
and is particularly useful when they are running at non-integer
multiples of one another.
1.System Clock generator: Use a 16.66 MHz Crystal to generate
eight 33.33MHz copies for PCI and four 100MHz copies for the
CPU or PCI-X.
2.Line Card Multiplier: Multiply 19.44MHz from a back plane to
77.76MHz for the line Card ASICs and Serdes.
3.Zero Delay buffer for Synchronous memory: Fan out up to
twelve 100MHz copies from a memory controller reference
clock to the memory chips on a memory module with zero delay.
• Fully integrated PLL
• Fourteen LVCMOS/LVTTL outputs; (12)clocks, (1)feedback,
• Selectable crystal oscillator interface or LVCMOS/LVTTL
reference clock inputs
• CLK0, CLK1 can accept the following input levels:
LVCMOS or LVTTL
• Output frequency range: 10MHz to 150MHz
• VCO range: 240MHz to 500MHz
• Output skew: 200ps (maximum)
• Cycle-to-cycle jitter, (all banks ÷4): 55ps (maximum)
• Full 3.3V supply voltage
• -40°C to 85°C ambient operating temperature
• Compatible with PowerPC™and Pentium™Microprocessors
• Available in both standard (RoHS 5) and lead-free (RoHS 6)
39 38 37 36 35 34 33 32 31 30 29 28 27
2 3 4 5 6 7 8 9 10 11 12 13
IDT™ / ICS™ LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER
10mm x 10mm x 1.4mm package body
ICS87972DYI-147 REV. A JUNE 5, 2008