http://www.www.datasheet4u.com

900,000+ Datasheet PDF Search and Download

Datasheet4U offers most rated semiconductors datasheets pdf




Integrated Device Technology Electronic Components Datasheet

ICS873991-147 Datasheet

LOW VOLTAGE LVCMOS/LVPECL-TO LVPECL/ECL CLOCK GENERATOR

No Preview Available !

ICS873991-147 pdf
wwwP.DRatEaSLhIeMetI4NU.AcoRmY
LOW VOLTAGE, LVCMOS/LVPECL-TO LVPECL/ECL
CLOCK GENERATOR
ICS873991-147
GENERAL DESCRIPTION
The ICS873991-147 is a low voltage, low skew, 3.3V
ICS LVPECL or ECL Clock Generator and a member of
HiPerClockS™ the HiPerClock S ™ family of High Performance
Clock Solutions from IDT. The ICS873991-147 has
two selectable clock inputs. The PCLK, nPCLK pair
can accept an LVPECL input and the REF_CLK pin can accept
a LVCMOS or LVTTL input. This device has a fully integrated
PLL along with frequency configurable outputs. An external
feedback input and output regenerates clocks with “zero de-
lay”.
The four independent banks of outputs each have their own
output dividers, which allow the device to generate a multitude
of different bank frequency ratios and output-to-input frequency
ratios. The output frequency range is 25MHz to 500MHz and
the input frequency range is 6.25MHz to 125MHz. The PLL_SEL
input can be used to bypass the PLL for test and system debug
purposes. In bypass mode, the input clock is routed around the
PLL and into the internal output dividers.
The ICS873991-147 also has a SYNC output which can be
used for system synchronization purposes. It monitors Bank A
and Bank C outputs for coincident rising edges and signals a
pulse per the timing diagrams in this data sheet. This feature is
used primarily in applications where Bank A and Bank C are
running at different frequencies, and is particularly useful when
they are running at non-integer multiples of each other.
Example Applications:
FEATURES
Fourteen differential 3.3V LVPECL/ECL outputs
Selectable differential LVPECL or REF_CLK inputs
PCLK, nPCLK can accept the following input levels:
LVPECL, CML, SSTL
REF_CLK accepts the following input levels:
LVCMOS, LVTTL
Input clock frequency range: 6.25MHz to 125MHz
Maximum output frequency: 500MHz
VCO range: 200MHz to 1GHz
Output skew: 70ps (typical)
Cycle-to-cyle jitter: 35ps (typical)
LVPECL mode operating voltage supply range:
VCC
=
3.135V
to
3.465V,
V
EE
=
0V
ECL mode operating voltage supply range:
VCC = 0V, VEE = -3.465V to -3.135V
0°C to 70°C ambient operating temperature
Available in lead-free (RoHS 6) package
Industrial temperature available upon request
PIN ASSIGNMENT
1. Line Card Multiplier: Multiply 19.44MHz from a back-plane
to 77.76MHz on the line card ASIC and Serdes.
2. Zero Delay Buffer: Fan out up to thirteen 100MHz copies
from a reference clock to multiple processing units on an
embedded system.
nQB3
QB3
VCCO
nQA0
QA0
nQA1
QA1
nQA2
QA2
nQA3
QA3
SYNC_SEL
VCO_SEL
39 38 37 36 35 34 33 32 31 30 29 28 27
40 26
41 25
42 24
43 23
44 ICS873991-147 22
45 52-Lead LQFP 21
46 10mm x 10mm x 1.4mm 20
47
package body
19
48 Y package 18
49 Top View 17
50 16
51 15
52 14
1 2 3 4 5 6 7 8 9 10 11 12 13
QC1
nQC1
QC0
nQC0
VCCO
QD1
nQD1
QD0
nQD0
VCCO
QFB
nQFB
VCCA
The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization
and/or qualification. Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.
IDT/ ICSLVPECL/ECL CLOCK GENERATOR
1
ICS873991AY-147 REV. A AUGUST 10, 2007


Integrated Device Technology Electronic Components Datasheet

ICS873991-147 Datasheet

LOW VOLTAGE LVCMOS/LVPECL-TO LVPECL/ECL CLOCK GENERATOR

No Preview Available !

ICS873991-147 pdf
ICS873991-147
LOW VOLTAGE, LVCMOS/LVPECL-TO-LVPECL/ECL CLOCK GENERATOR
BLOCK DIAGRAM
VCO_SEL Pulldown
PLL_EN Pulldown
REF_SEL Pulldown
REF_CLK Pulldown
nPCLK
PCLK
EXT_FB
nEXT_FB
MR Pulldown
FSEL_0:3 Pulldown
FSEL_FB0:2 Pulldown
PHASE
DETECTOR
LPF
VCO
FREQUENCY
GENERATOR
SYNC
SYNC_SEL Pulldown
PRELIMINARY
www.DataSheet4U.com
QA0
nQA0
QA1
nQA1
QA2
nQA2
QA3
nQA3
QB0
nQB0
QB1
nQB1
QB2
nQB2
QB3
nQB3
QC0
nQC0
QC1
nQC1
QC2
nQC2
QD0
nQD0
QD1
nQD1
QFB
nQFB
IDT/ ICSLVPECL/ECL CLOCK GENERATOR
2
ICS873991AY-147 REV. A AUGUST 10, 2007


Part Number ICS873991-147
Description LOW VOLTAGE LVCMOS/LVPECL-TO LVPECL/ECL CLOCK GENERATOR
Maker Integrated Device Technology
Total Page 17 Pages
PDF Download
ICS873991-147 pdf
Download PDF File
ICS873991-147 pdf
View for Mobile



Buy Electronic Components




Related Datasheet

1 ICS873991-147 LOW VOLTAGE LVCMOS/LVPECL-TO LVPECL/ECL CLOCK GENERATOR Integrated Device Technology
Integrated Device Technology
ICS873991-147 pdf
2 ICS873991-147 LOW VOLTAGE LVCMOS/LVPECL-TO LVPECL/ECL CLOCK GENERATOR Integrated Device Technology
Integrated Device Technology
ICS873991-147 pdf






Part Number Start With

0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F    G    H    I    J    K    L    M    N    O    P    Q    R    S    T    U    V    W    X    Y    Z

site map

webmaste! click here

contact us

Buy Components