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Integrated Device Technology Electronic Components Datasheet

ICS8512061I Datasheet

SINGLE CHANNEL 0.7V DIFFERENTIALTO-LVTTL TRANSCEIVER

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ICS8512061I pdf
SINGLE CHANNEL 0.7V DIFFERENTIAL-
TO-LVTTL TRANSCEIVER
General Description
The ICS8512061I is a transceiver which can
ICS interchange data across multipoint data bus
HiPerClockS™ structures.
The device has an LVTTL driver and one HCSL
receiver driver. It translates between LVTTL signals
and HCSL signals.
Applications
Backplane Transmission
Telecommunication System
Data Communications
ATCA Clock Distribution
ICS8512061I
Features
One HCSL output pair and one LVCMOS/LVTTL output
One single-ended LVCMOS/LVTTL signal input
LVTTL I/O signal: up to 250MHz
HCSL interface pins in high impedance state when the device is
powered down
Power-up and power-down glitch-free
Additive Phase Jitter, RMS: 0.23ps (typical)
Full 3.3V operating supply
-40°C to 85°C ambient operating temperature
Available in lead-free (RoHS 6) package
Block Diagram
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IREF
IN Pullup
DIR_SEL Pulldown
HCSL
Interface
QA
nQA
Pin Assignment
GND
QB
DIR_SEL
IN
1
2
3
4
8 QA
7 nQA
6 VDD
5 IREF
ICS8512061I
8 Lead TSSOP
4.40mm x 3.0mm x 0.925mm package body
G Package
Top View
IDT™ / ICS™ TRANSCEIVER
1 ICS8512061AGI REV. B NOVEMBER 19, 2008



Integrated Device Technology Electronic Components Datasheet

ICS8512061I Datasheet

SINGLE CHANNEL 0.7V DIFFERENTIALTO-LVTTL TRANSCEIVER

No Preview Available !

ICS8512061I pdf
ICS8512061I
SINGLE CHANNEL 0.7V DIFFERENTIAL-TO-LVTTL TRANSCEIVER
Table 1. Pin Descriptions
Number
1
2
3
4
5
6
7, 8
Name
GND
QB
DIR_SEL
IN
IREF
VDD
nQA, QA
Type
Power
Output
Input Pulldown
Input
Input
Power
Output
Pullup
Description
Power supply ground.
Single-ended output. LVCMOS/LVTTL interface levels.
HCSL receiver and driver direction select pin. When HIGH, selects the
IN-to-QA/nQA path. When LOW, selects the QA/nQA-to-QB path.
LVCMOS/LVTTL interface levels.
Single-ended signal input. LVCMOS/LVTTL interface levels.
An external fixed precision resistor (475) from this pin to ground provides a
reference current used for differential current-mode QA/nQA outputs.
Power supply pin.
Differential transceiver pair. HCSL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Symbol
Parameter
CIN Input Capacitance
CPD Power Dissipation
RPULLUP
Input Pullup Resistor
RPULLDOWN Input Pulldown Resistor
ROUT
Output Impedance QB
Test Conditions
VDD = 3.6V
Minimum
Typical
4
8
51
51
20
Maximum
Units
pF
pF
k
k
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
wwTwh.eDsaetarSahtienegts4Ua.rceomstress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Item
Supply Voltage, VDD
Inputs, VI
Outputs, VO
Package Thermal Impedance, θJA
Storage Temperature, TSTG
Rating
4.6V
-0.5V to VDD + 0.5V
-0.5V to VDD + 0.5V
129.5°C/W (0 mps)
-65°C to 150°C
DC Electrical Characteristics
Table 3A. Power Supply DC Characteristics, VDD = 3.3V ± 0.3V, TA = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum
VDD Core Supply Voltage
IDD Power Supply Current
3.0
Typical
3.3
Maximum
3.6
20
Units
V
mA
IDT™ / ICS™ TRANSCEIVER
2 ICS8512061AGI REV. B NOVEMBER 19, 2008



Integrated Device Technology Electronic Components Datasheet

ICS8512061I Datasheet

SINGLE CHANNEL 0.7V DIFFERENTIALTO-LVTTL TRANSCEIVER

No Preview Available !

ICS8512061I pdf
ICS8512061I
SINGLE CHANNEL 0.7V DIFFERENTIAL-TO-LVTTL TRANSCEIVER
Table 3B. LVCMOS/LVTTL DC Characteristics, VDD = 3.3V ± 0.3V, TA = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum
VIH Input High Voltage
VIL Input Low Voltage
IN
IIH Input High Current
DIR_SEL
IN
IIL Input Low Current
DIR_SEL
VOH
Output High Voltage;
NOTE 1
QB
VDD = VIN = 3.6V
VDD = VIN = 3.6V
VDD = 3.6V, VIN = 0V
VDD = 3.6V, VIN = 0V
VDD = 3.6V
2
-0.3
-150
-5
2.6
VOL
Output Low Voltage;
NOTE 1
QB
VDD = 3.6V
Typical
Maximum
VDD + 0.3
0.8
5
150
0.5
Units
V
V
µA
µA
µA
µA
V
V
NOTE: Outputs terminated with 50to VDD/2. See Parameter Measurement Information Section, Output Load Test Circuit diagram.
Table 3C. Differential DC Characteristics, VDD = 3.3V ± 0.3V, TA = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum
VPP
VCMR
Peak-to-Peak Voltage; NOTE 1
Common Mode Input Voltage; NOTE 1, 2
DIR_SEL = 0
DIR_SEL = 0
0.15
GND + 0.5
NOTE 1: VIL should not be less than -0.3V.
NOTE 2: Common mode input voltage is defined as VIH.
Typical
Maximum
1.3
VDD – 0.85
Units
V
V
AC Electrical Characteristics
Table 4A. LVTTL (QB) Output Mode, Receiver AC Characteristics, VDD = 3.3V ± 0.3V, TA = -40°C to 85°C
Symbol Parameter
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FMAX
Output Frequency
Test Conditions
Minimum
Typical
Maximum
250
tPD Propagation Delay, NOTE 1
QA/nQA to QB
1.7
2.5
tjit
Buffer Additive Phase Jitter, RMS
100MHz, Integration Range: 12kHz
– 20MHz
0.23
tR/tF Output Rise/Fall Time
odc Output Duty Cycle
20% - 80%
200
40
700
60
NOTE 1: Measured from VDD/2 input cross point to the output at VDD/2.
Units
MHz
ns
ps
ps
%
IDT™ / ICS™ TRANSCEIVER
3 ICS8512061AGI REV. B NOVEMBER 19, 2008




Part Number ICS8512061I
Description SINGLE CHANNEL 0.7V DIFFERENTIALTO-LVTTL TRANSCEIVER
Maker Integrated Device Technology
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