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Integrated Device Technology Electronic Components Datasheet

ICS83905 Datasheet

1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER

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ICS83905 pdf
LOW SKEW, 1:6 CRYSTAL-TO-
LVCMOS/LVTTL FANOUT BUFFER
ICS83905
GENERAL DESCRIPTION
The ICS83905 is a low skew, 1-to-6 LVCMOS / LVTTL
ICS Fanout Buffer and a member of the HiPerClockS™
HiPerClockS™ family of High Performance Clock Solutions from IDT.
The low impedance LVCMOS/LVTTL outputs are de-
signed to drive 50Ω series or parallel terminated
transmission lines. The effective fanout can be increased from 6
to 12 by utilizing the ability of the outputs to drive two series
terminated lines.
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The ICS83905 is characterized at full 3.3V, 2.5V, and 1.8V,
mixed 3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating
supply mode. Guaranteed output and part-to-part skew char-
acteristics along with the 1.8V output capabilities makes the
ICS83905 ideal for high performance, single ended applica-
tions that also require a limited output voltage.
FEATURES
Six LVCMOS / LVTTL outputs
Outputs able to drive 12 series terminated lines
Crystal oscillator interface
Crystal input frequency range: 10MHz to 40MHz
Output skew: 80ps (maximum)
RMS phase jitter @ 25MHz, (100Hz - 1MHz):
0.26ps (typical) (VDD = VDDO = 2.5V)
Phase noise:
Offset
Noise Power
100Hz ............. -129.7 dBc/Hz
1kHz ............. -144.4 dBc/Hz
10kHz ............. -147.3 dBc/Hz
100kHz ............. -157.3 dBc/Hz
PIN ASSIGNMENTS
ICS83905
20-Lead VFQFN
4mm x 4mm x 0.9mm
body package
K Package
Top View
GND
GND
BCLK0
VDDO
BCLK1
20 19 18 17 16
1 15
2 14
3 13
4 12
5 11
6 7 8 9 10
BCLK5
VDDO
BCLK4
GND
GND
5V tolerant enable inputs
Synchronous output enables
Operating power supply modes:
Full 3.3V, 2.5V and 1.8V,
mixed 3.3V core/2.5V output operating supply,
mixed 3.3V core/1.8V output operating supply,
mixed 2.5V core/1.8V output operating supply
0°C to 70°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
BLOCK DIAGRAM
XTAL_OUT
ENABLE 2
GND
BCLK0
VDDo
BCLK1
GND
BCLK2
1
2
3
4
5
6
7
8
16 XTAL_IN
15 ENABLE 1
14 BCLK5
13 VDDO
12 BCLK4
11 GND
10 BCLK3
9 VDD
ICS83905
16-Lead SOIC
3.9mm x 9.9mm x 1.38mm body
package
M Pacakge
Top View
16-Lead TSSOP
4.4mm x 5.0mm x 0.92mm body
package
G Pacakge
Top View
XTAL_IN
XTAL_OUT
ENABLE 1
ENABLE 2
SYNCHRONIZE
SYNCHRONIZE
BCLK0
BCLK1
BCLK2
BCLK3
BCLK4
BCLK5
IDT/ ICSLVCMOS/LVTTL FANOUT BUFFER
1
ICS83905AM REV. B JULY 9, 2007


Integrated Device Technology Electronic Components Datasheet

ICS83905 Datasheet

1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER

No Preview Available !

ICS83905 pdf
ICS83905
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
TABLE 1. PIN DESCRIPTIONS
Name
XTAL_OUT
XTAL_IN
ENABLE 1, ENABLE 2
BCLK0, BCLK1, BCLK2,
BCLK3, BCLK4, BCLK5
GND
VDD
VDDO
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Type
Output
Input
Input
Output
Power
Power
Power
Unused
Description
Crystal oscillator interface. XTAL_OUT is the output.
Crystal oscillator interface. XTAL_IN is the input.
Clock enable. LVCMOS / LVTTL interface levels. See Table 3.
Clock outputs. LVCMOS / LVTTL interface levels.
Power supply ground.
Core supply pin.
Output supply pin.
No connect.
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
Parameter
Input Capacitance
CPD
Power Dissipation Capacitance
(per output)
ROUT
Output Impedance
Test Conditions
VDDO = 3.465V
VDDO = 2.625V
VDDO = 2V
VDDO = 3.3V ± 5%
VDDO = 2.5V ± 5%
VDDO = 1.8V ± 0.2V
Minimum
Typical
4
7
7
10
Maximum
19
18
16
Units
pF
pF
pF
pF
Ω
Ω
Ω
TABLE 3. CLOCK ENABLE FUNCTION TABLE
Control Inputs
ENABLE 1 ENABLE 2
00
01
10
11
Outputs
BCLK0:BCLK4
BCLK5
LOW
LOW
LOW
Toggling
Toggling
LOW
Toggling
Toggling
BCLK5
BCLK0:4
ENABLE2
ENABLE1
FIGURE 1. ENABLE TIMING DIAGRAM
IDT/ ICSLVCMOS/LVTTL FANOUT BUFFER
2
ICS83905AM REV. B JULY 9, 2007


Part Number ICS83905
Description 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
Maker Integrated Device Technology
Total Page 19 Pages
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