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Integrated Device Technology Electronic Components Datasheet

ICS662-03 Datasheet

HDTV AUDIO/VIDEO CLOCK SOURCE

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ICS662-03 pdf
HDTV AUDIO/VIDEO CLOCK SOURCE
DATASHEET
ICS662-03
Description
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The ICS662-03 provides synchronous clock generation for
audio sampling clock rates derived from an HDTV stream.
The device uses the latest PLL technology to provide
superior phase noise and long term jitter performance. The
device also supports a 27 MHz output clock for video
MPEG applications from an HDTV reference clock.
Please contact ICS if you have a requirement for an input
and output frequency not included here.
Features
Packaged in 8-pin SOIC
Available in Pb (lead) free package
HDTV clock input
Low phase noise
Exact (0 ppm) multiplication ratios
Support for 256 and 384 times sampling rate
Supports 27 MHz output for video (MPEG)
Block Diagram
SEL3:0
Control
Circuitry
REF_IN
VDD
PLL
Clock
Synthesis
CLK
GND
IDT™ / ICS™ HDTV AUDIO/VIDEO CLOCK SOURCE
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ICS662-03
REV E 101807



Integrated Device Technology Electronic Components Datasheet

ICS662-03 Datasheet

HDTV AUDIO/VIDEO CLOCK SOURCE

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ICS662-03 pdf
ICS662-03
HDTV AUDIO/VIDEO CLOCK SOURCE
CLOCK SYNTHESIZER
Pin Assignment
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REF_IN
1
VDD
2
GND
3
S2 4
8 S0
7 S3
6 S1
5 CLK
8 pin (150 mil) SOIC
Pin Descriptions
Output Clock Selection Table
Input
Output
S3 S2 S1 S0 Frequency Frequency
(MHz)
(MHz)
0 0 0 0 74.175824
0 0 0 1 74.175824
0 0 1 0 74.175824
0 0 1 1 74.175824
0 1 0 0 74.175824
0 1 0 1 74.175824
0 1 1 0 74.175824
0 1 1 1 74.175824
1000
74.25
1001
74.25
1010
74.25
1011
74.25
1100
74.25
1101
74.25
1110
74.25
1111
74.25
8.192
11.2896
12.288
24.576
16.9344
18.432
36.864
27
8.192
11.2896
12.288
24.576
16.9344
18.432
36.864
27
Pin
Number
1
2
3
4
5
6
7
8
Pin
Name
REF_IN
VDD
GND
S2
CLK
S1
S3
S0
Pin
Type
Pin Description
Input Connect this pin to a HDTV clock input.
Power Connect to +3.3 V.
Power Connect to ground.
Input Output frequency selection. Determines output frequency per table above. On chip pull-up.
Output Clock output.
Input Output frequency selection. Determines output frequency per table above. On chip pull-up.
Input Output frequency selection. Determines output frequency per table above. On chip pull-up.
Input Output frequency selection. Determines output frequency per table above. On chip pull-up.
IDT™ / ICS™ HDTV AUDIO/VIDEO CLOCK SOURCE
2
ICS662-03 REV E 101807



Integrated Device Technology Electronic Components Datasheet

ICS662-03 Datasheet

HDTV AUDIO/VIDEO CLOCK SOURCE

No Preview Available !

ICS662-03 pdf
ICS662-03
HDTV AUDIO/VIDEO CLOCK SOURCE
CLOCK SYNTHESIZER
Application Information
Series Termination Resistor
Clock output traces should use series termination. To series
wwtewr.mdaitnasahteeeat45u.0comtrace (a commonly used trace impedance),
place a 33resistor in series with the clock line, as close to
the clock output pin as possible. The nominal impedance of
the clock output is 20.
Decoupling Capacitors
As with any high performance mixed-signal IC, the
ICS662-03 must be isolated from system power supply
noise to perform optimally.
Decoupling capacitors of 0.01µF must be connected
between VDD (pin 2) and the PCB ground plane (pin 3).
PCB Layout Recommendations
For optimum device performance and lowest output phase
noise, the following guidelines should be observed.
the component side of the board as close to the VDD pin as
possible. No vias should be used between decoupling
capacitor and VDD pin. The PCB trace to VDD pin should
be kept as short as possible, as should the PCB trace to the
ground via. Distance of the ferrite bead and bulk decoupling
from the device is less critical.
2) To minimize EMI and obtain the best signal integrity, the
33series termination resistor should be placed close to
the clock output.
3) An optimum layout is one with all components on the
same side of the board, minimizing vias through other signal
layers (the ferrite bead and bulk decoupling capacitor can be
mounted on the back). Other signal traces should be routed
away from the ICS662-03. This includes signal traces just
underneath the device, or on layers adjacent to the ground
plane layer used by the device.
1) Each 0.01µF decoupling capacitor should be mounted on
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS662-03. These ratings, which are
standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at
these or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Soldering Temperature
Rating
5.5 V
-0.5 V to VDD+0.5 V
0 to +70° C
-65 to +150° C
125° C
260° C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Min.
0
+3.0
Typ.
Max.
+70
+3.6
Units
°C
V
IDT™ / ICS™ HDTV AUDIO/VIDEO CLOCK SOURCE
3
ICS662-03 REV E 101807




Part Number ICS662-03
Description HDTV AUDIO/VIDEO CLOCK SOURCE
Maker Integrated Device Technology
Total Page 7 Pages
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