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Integrated Circuit Systems
Integrated Circuit Systems

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K170 Datasheet

Low EMI Clock Generator

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I CR O C LOC K
MK1704A
Low EMI Clock Generator
Description
The MK1704A is an upgraded version of the
MK1704 and is recommended for all new designs.
It offers more reduction in the frequency
amplitude peaks, and will support frequencies up
to 140 MHz.
The MK1704A generates a low EMI output clock
from a clock input. The part is designed to dither
the LCD interface clock or other clocks for flat
panel graphics controllers. The MK1704A uses
ICS/MicroClock’s proprietary mixture of analog
and digital Phase-Locked Loop (PLL) technology
to synthesize the frequency, and our patented
technique to spread the frequency spectrum of the
output, thereby reducing the frequency amplitude
peaks by several dB.
We offer many other clocks for computers and
computer peripherals. Consult us when you need
to remove crystals and oscillators from your board.
Features
• Packaged in 8 pin SOIC
• Provides a spread spectrum output clock
• Supports leading flat panel controllers
• Accepts a clock input, provides same frequency
dithered output
• Optimized for higher resolutions that require up
to 140 MHz, as well as 40 MHz (SVGA) and
65 MHz (XVGA) clocks
• Peak reduction by 7dB - 14 dB typical on 3rd-
19th odd harmonics
• Low EMI feature can be disabled
• 3.3 V or 5 V ±10% supply voltage
• Advanced, low power CMOS process
• See the MK1714-01 for a multiplier with low
EMI which can operate from a crystal
Block Diagram
S0
S1
Low EMI
Enable
Input Clock
VDD GND
Crystal
Oscillator
PLL Clock
Synthesis and
Spread Spectrum
Circuitry
Output
Buffer
Clock Out
MDS 1704A B
1
Revision 062599
Printed 11/15/00
MicroClock Division of ICS • 525 Race Street • San Jose • CA • 95126•(408)295-9800tel•(408)295-9818fax




Integrated Circuit Systems
Integrated Circuit Systems

K170 Datasheet Preview

K170 Datasheet

Low EMI Clock Generator

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K170 pdf
I CR O C LOC K
MK1704A
Low EMI Clock Generator
Pin Assignment
ICLK
VDD
GND
CLK
18
27
36
45
8 pin SOIC
DC
S0
S1
LEE
Clock Output Select Table (in MHz)
Input
Freq. spread
S1 S0 Min Nom Max Multiplier Mode
vs. CLK
0 0 60 135 140
x1
* +0.5, -1.5%
0 1 60 80 120
x1
* +0.5, -1.5%
1 0 30 40 60
x1 SVGA Down 2.5%
1 1 40 65 100
x1
XGA +0.5, -1.5%
*Note: Use only MK1704A with date code of 9909 or later.
Pin Descriptions
Pin #
1
2
3
4
5
6
7
8
Name
ICLK
VDD
GND
CLK
LEE
S1
S0
DC
Type Description
I Connect to a clock input as shown in the table above.
P Connect to +3.3V or +5V.
P Connect to ground.
O Clock Output; equal to input frequency.
I Low EMI Enable. Turns on the spread spectrum when high. Internal pull-up.
I Frequency Select 1 Input. Selects input/output clock range per table above. Internal pull-up.
I Frequency Select 0 Input. Selects input/output clock range per table above. Internal pull-up.
- Don't Connect. Do not connect anything to this pin.
Key: I = Input, O = output, P = power supply connection
External Components
A minimum number of external components are required for proper operation. A decoupling capacitor of
0.01µF should be connected between VDD and GND on pins 2 and 3, and a 33 terminating resistor
may be used on the clock output if the trace is longer than 1 inch. The MK1704A is designed for use with a
clock input only. For a crystal input, use the MK1704S or the MK1714-01R.
MDS 1704A B
2
Revision 062599
Printed 11/15/00
MicroClock Division of ICS • 525 Race Street • San Jose • CA • 95126•(408)295-9800tel•(408)295-9818fax




Integrated Circuit Systems
Integrated Circuit Systems

K170 Datasheet Preview

K170 Datasheet

Low EMI Clock Generator

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K170 pdf
I CR O C LOC K
MK1704A
Low EMI Clock Generator
Electrical Specifications
Parameter
Conditions
ABSOLUTE MAXIMUM RATINGS (note 1)
Supply Voltage, VDD
Referenced to GND
Inputs
Referenced to GND
Clock Outputs
Referenced to GND
Ambient Operating Temperature
Soldering Temperature
Max of 10 seconds
Storage temperature
DC CHARACTERISTICS (at 5.0V unless otherwise noted)
Operating Voltage, VDD
Input High Voltage, VIH, input clock only
Clock input
Input Low Voltage, VIL, input clock only
Clock input
Output High Voltage, VOH
IOH=-4mA
Output High Voltage, VOH
IOH=-25mA
Output Low Voltage, VOL
IOL=25mA
Operating Supply Current, IDD, 5V
No Load
Operating Supply Current, IDD, 3.3V
No Load
Input Capacitance
S0, S1 pins
Internal Pull-up Resistor
LEE pin only
AC CHARACTERISTICS (at 5.0V unless otherwise noted)
Input Clock Frequency
S1=0, S0=0
(Note 3)
S1=0, S0=1
S1=1, S0=0
S1=1, S0=1
Input Clock Duty Cycle
Time above VDD/2
Output Clock Rise Time
0.8 to 2.0V
Output Clock Fall Time
2.0 to 0.8V
Output Clock Duty Cycle
Time above 1.5V
Output Clock Frequency Variation from Mean
EMI Peak Frequency Reduction
3rd-19th odd harmonics
Minimum
-0.5
-0.5
0
-65
3
(VDD/2)+1
VDD-0.4
2.4
60
60
30
40
20
40
Typical
VDD/2
VDD/2
15
10
7
500
135
80
40
65
50
1 - 2.5
10 to 16
Maximum
7
VDD+.5V
VDD+.5V
70
260
150
5.5
(VDD/2)-1
0.4
140
120
60
100
80
1.5
1.5
60
Units
V
V
V
°C
°C
°C
V
V
V
V
V
V
mA
mA
pF
k
MHz
%
ns
ns
%
%
dB
Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged exposure
to levels above the operating limits but below the Absolute Maximums may affect device reliability.
2. Typical values are at 25°C.
3. Not tested; guaranteed by design.
MDS 1704A B
3
Revision 062599
Printed 11/15/00
MicroClock Division of ICS • 525 Race Street • San Jose • CA • 95126•(408)295-9800tel•(408)295-9818fax




Part Number K170
Description Low EMI Clock Generator
Maker Integrated Circuit Systems
Total Page 4 Pages
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