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IC42S16160 Integrated Circuit Solution 1M x 16bit Dynamic Ram with EDo Page Mode

Description The ICSI IC41C16100S and IC41LV16100S are 1,048,576 x KEY TIMING PARAMETERS Parameter Max. RAS Access Time (tRAC) Max. CAS Access Time (tCAC) Max. Column Address Access Time (tAA) Min. EDO Page Mode Cycle Time (tPC) Min. Read/Write Cycle Time (tRC) -45 45 11 22 16 77 PIN CONFIGURATIONS 50(44)-Pin TSOP II VCC I/O0 I/O1 I/O2 I/O3 VCC I/O4 I/O5 I/O6 I/O7 NC NC NC WE RAS NC NC A0 A1 A2 A3 VCC 1 2 3 ...
Features
• Extended Data-Out (EDO) Page Mode access cycle
• TTL compatible inputs and outputs; tristate I/O
• Refresh Interval: Refresh Mode: 1,024 cycles /16 ms RAS-Only, CAS-before-RAS (CBR), and Hidden Self refresh Mode - 1,024 cycles / 128ms
• JEDEC standard pinout
• Single power supply: 5V ± 10% (IC41C16100S) 3.3V ± 10% (IC41LV16100S)
• Byte Write and ...

Datasheet PDF File IC42S16160 Datasheet - 662.89KB

IC42S16160  






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