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Intersil Electronic Components Datasheet

ICL8068 Datasheet

14-Bit/16-Bit Microprocessor

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ICL8068 pdf
August 1997
ICL8052/ICL7104,
ICL8068/ICL7104
14-Bit/16-Bit, Microprocessor-
Compatible, 2-Chip, A/D Converter
Features
• 16-Bit/14-Bit Binary Three-State Latched Outputs Plus
Polarity and Overrange
• Ideally Suited for Interface to UARTs and
Microprocessors
• Conversion on Demand or Continuously
• Guaranteed Zero Reading for 0V Input
• True Polarity at Zero Count for Precise Null Detection
• Single Reference Voltage for True Ratiometric
Operation
• Onboard Clock and Reference
• Auto-Zero, Auto-Polarity
• Accuracy Guaranteed to 1 Count
• All Outputs TTL Compatible
±4V Analog Input Range
• Status Signal Available for External Sync, A/Z in
Preamp, Etc.
Description
The ICL7104, combined with the ICL8052 or ICL8068,
forms a member of Intersil’ high performance A/D converter
family. The ICL7104-16, performs the analog switching and
digital function for a 16-bit binary A/D converter, with full
three-state output, UART handshake capability, and other
outputs for easy interfacing. The ICL7014-14 is a 14-bit
version. The analog section, as with all Intersil’ integrating
converters, provides fully precise Auto-Zero, Auto-Polarity
(including ±0 null indication), single reference operation,
very high input impedance, true input integration over a
constant period for maximum EMI rejection, fully
rationmetric operation, over-range indication, and a
medium quality built-in reference. The chip pair also offers
optional input buffer gain for high sensitivity applications, a
built-in clock oscillator, and output signals for providing an
external Auto-Zero capability in preconditioning circuitry,
synchronizing external multiplexers, etc.
Ordering Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
PKG.
NO.
ICL8052CPD
0 to 70 14 Ld PDIP
E14.3
lCL8052CDD
0 to 70 14 Ld CERDIP F14.3
lCL8052ACPD
0 to 70 14 Ld PDIP
E14.3
ICL8052ACDD
0 to 70 14 Ld CERDIP F14.3
ICL8068CDD
0 to 70 14 Ld CERDIP F14.3
ICL8068ACDD
0 to 70 14 Ld CERDIP F14.3
lCL8068ACJD
0 to 70 14 Ld CERDIP F14.3
ICL7104-14CPL
0 to 70 40 Ld PDIP
E40.6
lCL7104-16CPL
0 to 70 40 Ld PDIP
E40.6
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
5-6
File Number 3091.1



Intersil Electronic Components Datasheet

ICL8068 Datasheet

14-Bit/16-Bit Microprocessor

No Preview Available !

ICL8068 pdf
ICL8052/ICL7104, ICL8068/ICL7104
Pinouts
ICL8052/ICL8068
(CERDIP, PDIP)
TOP VIEW
V- 1
COMP OUT 2
14 INT OUT
-1.2V
13 +BUFF IN
REF CAP 3
12 +INT IN
REF BYPASS 4
11 -INT IN
GND 5 VREF
10 -BUFF IN
REF OUT 6
9 BUFF OUT
REF SUPPLY 7
ICL8052/ 8 V++
ICL8068
(OUTLINE DWGS DD, JD, PD)
ICL7104-16
V++
DIG GND
STTS
POL
OR
BIT 16
BIT 15
BIT 14
BIT 13
BIT 12
BIT 11
BIT 10
BIT 9
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
ICL7104-14
V++ 1
ICL7104
(PDIP)
TOP VIEW
ICL7104-14
40 V-
ICL7104-16
DIG GND 2
39 COMP IN
STTS 3
38 REFCAP 1
POL
OR
BIT 14
BIT 13
4
5
6
7
37 VREF
36 AZ
35
ANALOG
GND
34 REFCAP 2
BIT 12 8
33 BUF IN
BIT 11 9
32 ANALOG I/P
BIT 10
BIT 9
NC
10 ICL7104-14 31 V+
11
(OUTLINE DWGS DL,
JL, PL)
30
CE/LD
12 29 SEN
NC 13
28 R/H
BIT 8 14
27 MODE
BIT 7 15
26 CLK 2
BIT 6 16
25 CLK 1
BIT 5 17
24 CLK 3
HBEN
BIT 4 18
23 HBEN
MBEN
BIT 3 19
22 LBEN
BIT 2 20
21 BIT 1
Functional Block Diagram
+15V -15V
RINT
CINT
BITS
-BUF IN BUF OUT -INT IN INT OUT
OR POL 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
REF
OUT 6
87 1
10 9
BUFFER
11 14
INTEG.
INT.
3 REF.
-
COMP. COMP
- OUT
300pF
5k
A1
+
8052/8068
A2
+
-
A3
+2
+5V
10k5 +BUF IN 13
-1.2V
+INT IN 12
50k-15V
10µF
CAZ
5 4 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
THREE-STATE OUTPUTS
LATCHES
24 HBEN
23 MBEN
COUNTER
22 LBEN
30 CE/LD
+BUF IN
33
AZ
36
COMP IN 300k
39
VREF
ANALOG
INPUT
ANALOG
GND
SW3
37 SW5
SW6
SW4
32
SW7
SW8 SW2
SW9
35
38 34
REF CAP (1)
REF CAP (2)
CREF
SW1
7104
ZERO
CROSSING
DETECTOR
CONTROL LOGIC
29 SEN
27 MODE
28 R/H
1
+15V
31
+5V
2 40 25 26 3
-15V CLOCK CLOCK STTS
(1) (2)
FIGURE 1. ICL8052A (8068A)/ICL7104 16-BIT/14-BIT A/D CONVERTER FUNCTIONAL DIAGRAM
5-7



Intersil Electronic Components Datasheet

ICL8068 Datasheet

14-Bit/16-Bit Microprocessor

No Preview Available !

ICL8068 pdf
ICL8052/ICL7104, ICL8068/ICL7104
Pin Descriptions
PIN NO. SYMBOL OPTION
DESCRIPTION
1 V++
Positive Supply Voltage: Nominally +15V.
2 GND
Digital Ground: 0V, ground return.
3 STTS
Status Output: HI during integrate and deintegrate until data is latched. LO when analog section
is in auto-zero configuration.
4 POL
Polarity: Three-state output. HI for positive input.
5 OR
Over Range: Three-state output.
6 BIT 16
BIT 14
-16
-14 Most Significant Bit (MSB).
7 BIT 15
BIT 13
-16 DATA Bits: Three-state outputs. See Table 3 for format of ENABLES and bytes. HIGH = true.
-14
8 BIT 14
BIT 12
-16
-14
9 BIT 13
BIT 11
-16
-14
10 BIT 12
BIT 10
-16
-14
11 BIT 11
BIT 9
-16
-14
12 BIT 10
NC
-16
-14
13 BIT 9
NC
-16
-14
14 BIT 8
15 BIT 7
16 BIT 6
17 BIT 5
18 BIT 4
19 BIT 3
20 BIT 2
21 BIT 1
Least Significant Bit (LSB).
22 LBEN
LOW BYTE ENABLE: If not in handshake mode (see pin 27) when LO (with CE/LD, pin 30)
activates low-order byte outputs, BITS 1-8. When in handshake mode (see pin 27), serves as a
low byte flag output. See Figures 11, 12, 13.
23 MBEN
-16 MID BYTE ENABLE: Activates Bits 9-16, see LBEN (pin 22)
HBEN
-14 HIGH BYTE ENABLE: Activates Bits 9-14, POL, OR, see LBEN (pin 22)
24 HBEN
-16 HIGH BYTE ENABLE: Activates POL, OR, see LBEN (pin 22).
CLOCK3
-14 RC oscillator pin: Can be used as clock output.
5-8




Part Number ICL8068
Description 14-Bit/16-Bit Microprocessor
Maker INTERSIL
Total Page 21 Pages
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