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Freescale Semiconductor Electronic Components Datasheet

MC33780 Datasheet

Dual DBUS Master

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MC33780 pdf
www.DFatraSeheesetc4Ua.lceomSemiconductor
Technical Data
Document order number: MC33780
Rev 3.0, 5/2006
Dual DBUS Master with
Differential Drive and
Frequency Spreading
The 33780 is a master device for two differential DBUS buses. It
contains the logic to interface the buses to a standard serial
peripheral interface (SPI) port and the analog circuitry to drive data
and power over the bus as well as receive data from the remote slave
devices.
The differential mode of the 33780 generates lower electro-
magnetic interference (EMI) in situations where data rates and wiring
make this a problem. Frequency spreading further reduces in-
terference by spreading the energy across many channels, reducing
the energy in any single channel.
Features
• Two Independent DBUS I/Os
• Common SPI Interface for All Operations
• Open-Drain Interrupt Output with Pull-up
• Maskable Interrupts for Send and Receive Data Status
• Automatic Message Cyclical Redundancy Checking (CRC)
Generation and Checking
• Four-Stage Transmit and Receive Buffers
• 8- to 16-Bit Messages with 0- to 8-Bit CRC
• Independent Frequency Spreading for Each Channel
• Pb-Free Packaging Designated by Suffix Code EG
33780
DIFFERENTIAL DBUS MASTER
EG (Pb-FREE SUFFIX)
98ASB42567B
16-TERMINAL SOICW
ORDERING INFORMATION
Device
Temperature
Range (TA)
Package
MC33780EG/R2 -40°C to 85°C
16 SOICW
+5.0 V
+25 V
MCU
VCC
SCLK
CS
MOSI
MISO
RST
INT
CLK
GND
33780
VCC VSUP
SCLK
CS
MOSI
MISO
D0H
D0L
RST
INT
D1H
D1L
CLK
GND
DSI/DBUS SLAVE
Twisted Pair
33793
DSI/DBUS SLAVE
33793
4.7 nF capacitors from D0H, D0L, D1H
and D1L to circuit ground are required
for proper operation.
Figure 1. 33780 Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2006. All rights reserved.



Freescale Semiconductor Electronic Components Datasheet

MC33780 Datasheet

Dual DBUS Master

No Preview Available !

MC33780 pdf
www.DaItNaTSEhReeNtA4UL .BcoLmOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
VCC
VSUP
CLK
SCLK
MISO
MOSI
CS
INT
RST
Spreader
SPI,
Registers and
Interrupt
Generator
TLIM
DSIF
DSIS
DSIR
DBUS
Driver/Receiver
DSIF
DSIS
DSIR
DBUS
Driver/Receiver
Figure 2. 33780 Internal Block Diagram
D0H
D0L
D1H
D1L
GND
GND
GND
33780
2
Analog Integrated Circuit Device Data
Freescale Semiconductor



Freescale Semiconductor Electronic Components Datasheet

MC33780 Datasheet

Dual DBUS Master

No Preview Available !

MC33780 pdf
www.DataSheet4U.com
TERMINAL CONNECTIONS
TERMINAL CONNECTIONS
RST
CS
INT
MOSI
SCLK
MISO
CLK
GND
1
2
3
4
5
6
7
8
16 GND
15 D0L
14 D0H
13 VSUP
12 D1H
11 D1L
10 GND
9 VCC
Figure 3. 33780 Terminal Connections
Table 1. 33780 Terminal Definitions
A functional description of each terminal can be found in the Functional Terminal Descriptions section beginning on page 13.
Terminal
Terminal
Name
Terminal
Function
Formal Name
Definition
1
RST
Reset
IC Reset
A low level on this terminal returns all registers to a known state as
indicated in the section entitled Register and Bit Descriptions.
2
CS
Input
SPI Chip Select Input When this signal is high, SPI signals are ignored. Asserting this terminal
low starts an SPI transaction. The SPI transaction is signaled as
completed when this signal returns high.
3
INT
Output
Interrupt Output This output will be asserted low when an enabled interrupt condition
occurs. It contains a pullup current source that will perform a pullup when
unasserted.
4
MOSI
Input
Master Out Slave In SPI data into this IC. This data input is sampled on the positive edge of
SCLK.
5
SCLK
Input
Serial Data Clock Clocks in/out the data to/from the SPI. MISO data changes on the
negative transition of the SCLK. MOSI is sampled on the positive edge of
the SCLK.
6
MISO
Output
Master In Slave Out SPI data sent to the MCU by this device. This data output changes on the
negative edge of SCLK. When CS is high, this terminal is high
impedance.
7
CLK Input
Clock Input
4.0 MHz clock input.
8
GND
Ground
Ground
Ground reference for analog and digital circuits.
9
VCC
Input
Logic Supply
Logic power source input.
10
GND
Ground
Power Ground Bus 1 power return.
11 D1L Output Driver Low-Side Bus 1 Bus 1 low side.
12
D1H
Output Driver High-Side Bus 1 Bus 1 high side.
13
VSUP
Output
Positive Supply for This supply input is used to provide the positive level output of the bus.
Bus Output
14
D0H
Output Driver High-Side Bus 0 Bus 0 high side.
15 D0L Output Driver Low-Side Bus 0 Bus 0 low side.
16
GND
Ground
Power Ground Bus 0 power return.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33780
3




Part Number MC33780
Description Dual DBUS Master
Maker Freescale Semiconductor
Total Page 30 Pages
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