http://www.www.datasheet4u.com

900,000+ Datasheet PDF Search and Download

Datasheet4U offers most rated semiconductors datasheets pdf




Fairchild Semiconductor Electronic Components Datasheet

M74HC125 Datasheet

3-STATE Quad Buffers

No Preview Available !

M74HC125 pdf
September 1983
Revised February 1999
MM74HC125/MM74HC126
3-STATE Quad Buffers
General Description
The MM74HC125 and MM74HC126 are general purpose
3-STATE high speed non-inverting buffers utilizing
advanced silicon-gate CMOS technology. They have high
drive current outputs which enable high speed operation
even when driving large bus capacitances. These circuits
possess the low power dissipation of CMOS circuitry, yet
have speeds comparable to low power Schottky TTL cir-
cuits. Both circuits are capable of driving up to 15 low
power Schottky inputs.
The MM74HC125 require the 3-STATE control input C to
be taken high to put the output into the high impedance
condition, whereas the MM74HC126 require the control
input to be low to put the output into high impedance.
All inputs are protected from damage due to static dis-
charge by diodes to VCC and ground.
Features
s Typical propagation delay: 13 ns
s Wide operating voltage range: 2–6V
s Low input current: 1 µA maximum
s Low quiescent current: 80 µA maximum (74HC)
s Fanout of 15 LS-TTL loads
Ordering Code:
Order Number Package Number
Package Description
MM74HC125M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
MM74HC125SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC125MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HC125N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
MM74HC126M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
MM74HC126SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC126MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HC126N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. (Tape and Reel not available in N14A.)
Connection Diagrams
Pin Assignments for DIP, SOIC, SOP and TSSOP
Top View (MM74HC125)
Truth Tables
Inputs
AC
HL
LL
XH
Output
Y
H
L
Z
© 1999 Fairchild Semiconductor Corporation DS005308.prf
Top View (MM74HC126)
Inputs
AC
HH
LH
XL
Output
Y
H
L
Z
www.fairchildsemi.com


Fairchild Semiconductor Electronic Components Datasheet

M74HC125 Datasheet

3-STATE Quad Buffers

No Preview Available !

M74HC125 pdf
Absolute Maximum Ratings(Note 1)
(Note 2)
Supply Voltage (VCC)
DC Input Voltage (VIN)
DC Output Voltage (VOUT)
Clamp Diode Current (IIK, IOK)
DC Output Current, per pin (IOUT)
DC VCC or GND Current, per pin
(ICC)
Storage Temperature Range (TSTG)
Power Dissipation (PD)
(Note 3)
S.O. Package only
Lead Temperature (TL)
(Soldering 10 seconds)
0.5 to +7.0V
1.5 to VCC +1.5V
0.5 to VCC +0.5V
±20 mA
±35 mA
±70 mA
65°C to +150°C
600 mW
500 mW
260°C
Recommended Operating
Conditions
Min Max Units
Supply Voltage (VCC)
26 V
DC Input or Output Voltage
0 VCC V
(VIN, VOUT)
Operating Temperature Range (TA) 40 +85 °C
Input Rise or Fall Times (tr, tf)
VCC = 2.0V
1000 ns
VCC = 4.5V
500 ns
VCC = 6.0V
400 ns
Note 1: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating — plastic “N” package:
12 mW/°C from 65°C to 85°C.
DC Electrical Characteristics (Note 4)
Symbol
Parameter
Conditions
VCC
TA = 25°C
TA = −40 to 85°C TA = −40 to 125°C Units
Typ Guaranteed Limits
VIH Minimum HIGH Level
Input Voltage
2.0V
4.5V
1.5 1.5
3.15 3.15
1.5
3.15
V
V
6.0V
4.2 4.2
4.2 V
VIL Maximum LOW Level
Input Voltage
2.0V
4.5V
0.5 0.5
1.35 1.35
0.5 V
1.35 V
6.0V
1.8 1.8
1.8 V
VOH Minimum HIGH Level
Output Voltage
VIN = VIH or VIL
|IOUT| 20 µA
2.0V
4.5V
6.0V
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9 V
4.4 V
5.9 V
VOL Maximum LOW Level
Output Voltage
VIN = VIH or VIL
|IOUT| 6.0 mA
|IOUT| 7.8 mA
VIN = VIH or VIL
|IOUT| 20 µA
4.5V 4.2 3.98
6.0V 5.7 5.48
2.0V
0
0.1
4.5V
0
0.1
6.0V
0
0.1
3.84
5.34
0.1
0.1
0.1
3.7 V
5.2 V
0.1 V
0.1 V
0.1 V
VIN = VIH or VIL
|IOUT| 6.0 mA
4.5V 0.2 0.26
0.33
0.4 V
|IOUT| 7.8 mA
6.0V 0.2 0.26
0.33
0.4 V
IOZ Maximum 3-STATE Output VIN = VIH or VIL
6.0V
±0.5 ±5
±10 µA
Leakage Current
VOUT = VCC or GND
Cn = Disabled
IIN
Maximum Input Current
VIN = VCC or GND
6.0V
±0.1 ±1.0
±1.0
µA
ICC Maximum Quiescent
VIN = VCC or GND
6.0V
8.0 80
160 µA
Supply Current
IOUT = 0 µA
Note 4: For a power supply of 5V ±10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when
designing with this supply. Worst case VIH and VIL occur at VCC=5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current
(IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.
www.fairchildsemi.com
2


Part Number M74HC125
Description 3-STATE Quad Buffers
Maker Fairchild Semiconductor
Total Page 6 Pages
PDF Download
M74HC125 pdf
Download PDF File
M74HC125 pdf
View for Mobile



Buy Electronic Components




Related Datasheet

1 M74HC123 DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATOR ST Microelectronics
ST Microelectronics
M74HC123 pdf
2 M74HC125 QUAD BUS BUFFERS 3-STATE ST Microelectronics
ST Microelectronics
M74HC125 pdf
3 M74HC125 3-STATE Quad Buffers Fairchild Semiconductor
Fairchild Semiconductor
M74HC125 pdf
4 M74HC126 QUAD BUS BUFFERS 3-STATE ST Microelectronics
ST Microelectronics
M74HC126 pdf






Part Number Start With

0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F    G    H    I    J    K    L    M    N    O    P    Q    R    S    T    U    V    W    X    Y    Z

site map

webmaste! click here

contact us

Buy Components