http://www.www.datasheet4u.com

900,000+ Datasheet PDF Search and Download

Datasheet4U offers most rated semiconductors datasheets pdf




FMD
FMD

93C56A Datasheet Preview

93C56A Datasheet

3-Wire Serial EEPROM

No Preview Available !

93C56A pdf
Fremont Micro Devices
3-Wire Serial EEPROM
1K, 2K and 4Kbit (8-bit or 16-bit wide)
93C46/A, 93C56/A, 93C66/A
FEATURES
Standard Voltage and Low Voltage Operation:
FT93C46/56/66:
VCC = 2.5V to 5.5V
FT93C46A/56A/66A:
VCC = 1.8V to 5.5V
User Selectable Internal Organization:
FT93C46: 128 x 8 or 64 x 16
FT93C56: 256 x 8 or 128 x 16
FT93C66: 512 x 8 or 256 x 16
2 MHz Clock Rate (5V) Compatibility.
Industry Standard 3-wire Serial Interface.
Self-Timed ERASE/WRITE Cycles (5ms max including auto-erase).
Automatic ERAL before WRAL.
Sequential READ Function.
High Reliability: Typical 1 Million Erase/Write Cycle Endurance.
100 Years Data Retention.
Industrial Temperature Range (-40o C to 85o C).
Standard 8-pin PDIP/SOIC/TSSOP Pb-free Packages.
DESCRIPTION
The FT93C46/56/66 series are 1024/2048/4096 bits of serial Electrical Erasable and Programmable
Read Only Memory, commonly known as EEPROM. They are organized as 64/128/256 words of 16 bits
each when the ORG pin is connected to VCC (or unconnected) and 128/256/512 words of 8 bits (1 byte)
each when the ORG pin is tied to ground. The devices are fabricated with proprietary advanced CMOS
process for low power and low voltage applications. These devices are available in standard 8-lead
PDIP, 8-lead JEDEC SOIC and 8-lead TSSOP packages. Our extended VCC range (1.8V to 5.5V)
devices enables wide spectrum of applications.
The FT93C46/56/66 is enabled through the Chip Select pin (CS), and accessed via a 3-wire serial
interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SCL). Upon receiving a READ
instruction at DI, the address is decoded and the data is clocked out serially on the data output pin DO.
The WRITE cycle is completely self-timed and no separate ERASE cycle is required before WRITE. The
WRITE cycle is only enabled when the part is in the ERASE/WRITE ENABLE state. Once a device
begins its self-timed program procedure, the data out pin (DO) can indicate the READY/BUSY status by
rising chip select (CS).
© 2013 Fremont Micro Devices Inc.
Confidential Rev. 0.8
DS93CXX-A-page1




FMD
FMD

93C56A Datasheet Preview

93C56A Datasheet

3-Wire Serial EEPROM

No Preview Available !

93C56A pdf
Fremont Micro Devices
PIN CONFIGURATION
Pin Name
CS
SCL
DI
DO
ORG
DC
VCC
GND
Pin Function
Chip Select
Serial Clock
Serial Data Input
Serial Data Output
Internal Organization
Don’t Connect
Power Supply
Ground
All these packaging types come in Pb-free certified.
CS
SCL
DI
DO
1
2
3
4
8 VCC
7 DC
6 ORG
5 GND
8L PDIP
93C46/A, 93C56/A, 93C66/A
CS
SCL
DI
DO
1
2
3
4
8 VCC
7 DC
6 ORG
5 GND
8L SOIC
CS
SCL
DI
DO
1
2
3
4
8 VCC
7 DC
6 ORG
5 GND
DC
VCC
CS
SCL
1
2
3
4
8 ORG
7 GND
6 DO
5 DI
8L TSSOP
ABSOLUTE MAXIMUM RATINGS
Industrial operating temperature:
Storage temperature:
Input voltage on any pin relative to ground:
Maximum voltage:
8L SOIC
Rotated (R)
93C46 only
-40oC to 85oC
-50oC to 125oC
-0.3V to VCC + 0.3V
8V
* Stresses exceed those listed under “Absolute Maximum Rating” may cause permanent damage to the
device. Functional operation of the device at conditions beyond those listed in the specification is not
guaranteed. Prolonged exposure to extreme conditions may affect device reliability or functionality.
© 2013 Fremont Micro Devices Inc.
Confidential Rev. 0.8
DS93CXX-A-page2




FMD
FMD

93C56A Datasheet Preview

93C56A Datasheet

3-Wire Serial EEPROM

No Preview Available !

93C56A pdf
Fremont Micro Devices
93C46/A, 93C56/A, 93C66/A
PIN DESCRIPTIONS
(A) SERIAL CLOCK (SCL)
The rising edge of this SCL input is to latch data into the EEPROM device while the rising edge of this
clock is to clock data out of the EEPROM device.
(B) CHIP SELECT (CS)
This is the chip select input signal for the serial EEPROM device. .
(C) SERIAL DATA INPUT (DI)
This is data input signal for the serial device.
(D) SERIAL DATA OUTPUT (DO)
This is data output signal for the serial device.
(E) INTERNAL ORGANIZATION (ORG)
This is internal organization input signal for the serial EEPROM device. When the ORG pin is
connected to VCC or unconnected the EEPROM is organized as 64/128/256 word of 16 bits each and
when ORG pin is connected to ground the EEPROM is organized as 128/256/512 byte of 8 bits each.
Typically, these signals are hardwired to either VIH or VIL. If left unconnected, they are internally
recognized as VIH.
© 2013 Fremont Micro Devices Inc.
Confidential Rev. 0.8
DS93CXX-A-page3




Part Number 93C56A
Description 3-Wire Serial EEPROM
Maker FMD
Total Page 23 Pages
PDF Download
93C56A pdf
Download PDF File
93C56A pdf
View for Mobile






Related Datasheet

1 93C56 3-Wire Serial EEPROMs ATMEL Corporation
ATMEL Corporation
93C56 pdf
2 93C56 16Kbit/ 8Kbit/ 4Kbit/ 2Kbit/ 1Kbit and 256bit 8-bit or 16-bit wide STMicroelectronics
STMicroelectronics
93C56 pdf
3 93C56 Electrically Erasable Programmable Memories National Semiconductor
National Semiconductor
93C56 pdf
4 93C56 2K 5.0V Automotive Temperature Microwire Serial EEPROM Microchip Technology
Microchip Technology
93C56 pdf
5 93C56 3-Wire Serial EEPROM FMD
FMD
93C56 pdf
6 93C56A 2K Microwire Compatible Serial EEPROM Microchip Technology
Microchip Technology
93C56A pdf
7 93C56A 3-Wire Serial EEPROM FMD
FMD
93C56A pdf
8 93C56B 2K Microwire Compatible Serial EEPROM Microchip Technology
Microchip Technology
93C56B pdf
9 93C56BEP 2K 5.0V Automotive Temperature Microwire Serial EEPROM Microchip Technology
Microchip Technology
93C56BEP pdf




Part Number Start With

0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F    G    H    I    J    K    L    M    N    O    P    Q    R    S    T    U    V    W    X    Y    Z

site map

webmaste! click here

contact us

Buy Components