http://www.www.datasheet4u.com

900,000+ Datasheet PDF Search and Download

Datasheet4U offers most rated semiconductors datasheets pdf



Cypress Semiconductor Electronic Components Datasheet

W194 Datasheet

Frequency Multiplier and Zero Delay Buffer

No Preview Available !

W194 pdf
W194
Frequency Multiplier and Zero Delay Buffer
Features
• Two outputs
• Configuration options allow various multiplications of
the reference frequency—refer to Table 1 to determine
the specific option which meets your multiplication
needs
• Available in 8-pin SOIC package
Key Specifications
Operating Voltage: .............................. 3.3V±5% or 5.0±10%
Operating Range: .......................10 MHz < fOUT1 < 133 MHz
Absolute Jitter: ......................................................... ±500 ps
Output to Output Skew: .............................................. 250 ps
Propagation Delay: ................................................... ±350 ps
Propagation delay is affected by input rise time.
Block Diagram
Table 1. Configuration Options
FBIN
OUT1
OUT1
OUT1
OUT1
OUT2
OUT2
OUT2
OUT2
FS0 FS1
OUT1
0 0 2 X REF
1 0 4 X REF
01
REF
1 1 8 X REF
0 0 4 X REF
1 0 8 X REF
0 1 2 X REF
1 1 16 X REF
Pin Configuration
OUT2
REF
2 X REF
REF/2
4 X REF
2 X REF
4 X REF
REF
8 X REF
FBIN
FS0
÷Q
FS1
External feedback connection to
OUT1 or OUT2, not both
FBIN
IN
GND
FS0
SOIC
18
27
36
45
OUT2
VDD
OUT1
FS1
IN
Reference
Input
Phase
Detector
Charge
Pump
Loop
Filter
Output
Buffer
VCO
÷2
Output
Buffer
OUT1
OUT2
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
January 5, 2000, rev. *A



Cypress Semiconductor Electronic Components Datasheet

W194 Datasheet

Frequency Multiplier and Zero Delay Buffer

No Preview Available !

W194 pdf
W194
Pin Definitions
Pin Name
IN
FBIN
Pin No.
2
1
OUT1
OUT2
VDD
GND
FS0:1
6
8
7
3
4, 5
Pin
Type
I
I
O
O
P
P
I
Pin Description
Reference Input: The output signals will be synchronized to this signal.
Feedback Input: This input must be fed by one of the outputs (OUT1 or OUT2) to ensure
proper functionality. If the trace between FBIN and the output pin being used for feedback
is equal in length to the traces between the outputs and the signal destinations, then the
signals received at the destinations will be synchronized to the REF signal input (IN).
Output 1: The frequency of the signal provided by this pin is determined by the feedback
signal connected to FBIN, and the FS0:1 inputs (see Table 1).
Output 2: The frequency of the signal provided by this pin is one-half of the frequency of
OUT1. See Table 1.
Power Connections: Connect to 3.3V or 5V. This pin should be bypassed with a 0.1-µF
decoupling capacitor. Use ferrite beads to help reduce noise for optimal jitter perfor-
mance.
Ground Connection: Connect all grounds to the common system ground plane.
Function Select Inputs: Tie to VDD (HIGH, 1) or GND (LOW, 0) as desired per Table 1.
Overview
The W194-70 is a two-output zero delay buffer and frequency
multiplier. It provides an external feedback path allowing max-
imum flexibility when implementing the Zero Delay feature.
This is explained further in the sections of this data sheet titled
How to Implement Zero Delay,and Inserting Other Devices
in Feedback Path.
The W194-70 is a pin-compatible upgrade of the Cypress
W42C70-01. The W194-70 addresses some application de-
pendent problems experienced by users of the older device.
CA
G
10 µF
Ferrite
Bead
C8
0.01 µF
V+ Power Supply Connection
G
FBIN
IN
GND
FS0
1
2
3
G
4
OUT 2
8
VDD
7
OUT 1
6
5
22
OUTPUT 2
C9 = 0.1 µF
G
22
OUTPUT 1
FS1
Figure 1. Schematic/Suggested Layout
2



Cypress Semiconductor Electronic Components Datasheet

W194 Datasheet

Frequency Multiplier and Zero Delay Buffer

No Preview Available !

W194 pdf
W194
How to Implement Zero Delay
Typically, zero delay buffers (ZDBs) are used because a de-
signer wants to provide multiple copies of a clock signal in
phase with each other. The whole concept behind ZDBs is that
the signals at the destination chips are all going HIGH at the
same time as the input to the ZDB. In order to achieve this,
layout must compensate for trace length between the ZDB and
the target devices. The method of compensation is described
below.
External feedback is the trait that allows for this compensation.
The PLL on the ZDB will cause the feedback signal to be in
phase with the reference signal. When laying out the board,
match the trace lengths between the output being used for
feedback and the FBIN input to the PLL.
If it is desirable to either add a little delay, or slightly precede
the input signal, this may also be affected by either making the
trace to the FBIN pin a little shorter or a little longer than the
traces to the devices being clocked.
Inserting Other Devices in Feedback Path
Another nice feature available due to the external feedback is
the ability to synchronize signals to the signal coming from
some other device. This implementation can be applied to any
device (ASIC, multiple output clock buffer/driver, etc.) which is
put into the feedback path.
Referring to Figure 2, if the traces between the ASIC/Buffer
and the destination of the clock signal(s) (A) are equal in length
to the trace between the buffer and the FBIN pin, the signals
at the destination(s) device will be driven HIGH at the same
time the Reference clock provided to the ZDB goes HIGH.
Synchronizing the other outputs of the ZDB to the outputs from
the ASIC/Buffer is more complex however, as any propagation
delay from the ZDB output to the ASIC/Buffer output must be
accounted for.
Reference
Signal
Feedback
Input
Zero
Delay
Buffer
ASIC/
Buffer
A
Figure 2. 6 Output Buffer in the Feedback Path
3




Part Number W194
Description Frequency Multiplier and Zero Delay Buffer
Maker Cypress Semiconductor
Total Page 6 Pages
PDF Download
W194 pdf
Download PDF File
W194 pdf
View for Mobile






Related Datasheet

1 W191 Skew Controlled SDRAM Buffer SpectraLinear
SpectraLinear
W191 pdf
2 W1934S Color Monitor LG
LG
W1934S pdf
3 W194 Frequency Multiplier and Zero Delay Buffer Cypress Semiconductor
Cypress Semiconductor
W194 pdf
4 W1942S LCD User Guide LG
LG
W1942S pdf
5 W195B Frequency Generator for Integrated Core Logic Cypress Semiconductor
Cypress Semiconductor
W195B pdf
6 W196 Spread Spectrum FTG for 440BX and VIA Apollo Pro-133 Cypress Semiconductor
Cypress Semiconductor
W196 pdf
7 W196 Spread Spectrum FTG SpectraLinear
SpectraLinear
W196 pdf
8 W1975MC650 Rectifier Diode IXYS
IXYS
W1975MC650 pdf
9 W1975MC680 Rectifier Diode IXYS
IXYS
W1975MC680 pdf


Part Number Start With

0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F  G  H  I  J  K  L  M  N  O  P  Q  R  S  T  U  V  W  X  Y  Z

site map

webmaste! click here

contact us

Buy Components