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Cypress Semiconductor Electronic Components Datasheet

CYK001M16SCCA Datasheet

16-Mbit (1M x 16) Pseudo Static RAM

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CYK001M16SCCA
MoBL®
16-Mbit (1M x 16) Pseudo Static RAM
Features
• Advanced low-power MoBL® architecture
• High speed: 55 ns, 70 ns
• Wide voltage range: 2.7V to 3.3V
• Typical active current: 3 mA @ f = 1 MHz
• Typical active current: 13 mA @ f = fMAX
• Low standby power
• Automatic power-down when deselected
Functional Description[1]
The CYK001M16SCCA is a high-performance CMOS pseudo
static RAM (PSRAM) organized as 1M words by 16 bits that
supports an asynchronous memory interface. This device
features advanced circuit design to provide ultra-low active
current. This is ideal for providing More Battery Life(MoBL)
in portable applications such as cellular telephones. The
device can be put into standby mode, reducing power
consumption dramatically when deselected (CE1 LOW, CE2
HIGH or both BHE and BLE are HIGH). The input/output pins
(I/O0 through I/O15) are placed in a high-impedance state
when the chip is deselected (CE1 HIGH, CE2 LOW) or OE is
deasserted HIGH, or during a write operation (Chip Enabled
and Write Enable WE LOW). Reading from the device is
accomplished by asserting the Chip Enables (CE1 LOW and
CE2 HIGH) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is
LOW, then data from memory will appear on I/O8 to I/O15. See
the Truth Table for a complete description of read and write
modes.
Logic Block Diagram
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
DATA IN DRIVERS
1M x 16
RAM Array
I/O0–I/O7
I/O8–I/O15
COLUMN DECODER
Power -Down
Circuit
BHE
BLE
BHE
WE
OE
BLE
CE2
CE1
CE2
CE1
Note:
1. For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-05426 Rev. *D
Revised January 26, 2005
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Cypress Semiconductor Electronic Components Datasheet

CYK001M16SCCA Datasheet

16-Mbit (1M x 16) Pseudo Static RAM

No Preview Available !

CYK001M16SCCA pdf
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Pin Configuration[2, 3, 4]
CYK001M16SCCA
MoBL®
48-Ball FBGA
Top View
12
34
56
BLE OE A0 A1 A2 CE2
I/O8 BHE A3 A4 CE1 I/O0
I/O9 I/O10 A5 A6 I/O1 I/O2
VSS I/O11 A17 A7 I/O3 VCC
VCC I/O12 DNU A16 I/O4 VSS
I/O14 I/O13 A14 A15 I/O5 I/O6
I/O15 A19 A12 A13 WE I/O7
A18 A8 A9 A10 A11 NC
A
B
C
D
E
F
G
H
Product Portfolio[5]
Power Dissipation
Product
VCC Range
(V)
Min. Typ. Max.
Speed
(ns)
Operating, ICC (mA)
f = 1 MHz
Typ.[5] Max.
f = fMAX
Typ.[5] Max.
Standby, ISB2
(µA)
Typ.[5] Max.
CYK001M16SCCA
2.7 3.0 3.3
55
3
5 13 22 80 150
70 17
Notes:
2. DNU pins are to be left floating or tied to VSS.
3. Ball H6 is the address expansion pins for the 32-Mb density.
4. NC “no connect”–not connected internally to the die.
5. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC (typ) and TA = 25°C.
Document #: 38-05426 Rev. *D
DataSheet4 U .com
Page 2 of 10


Part Number CYK001M16SCCA
Description 16-Mbit (1M x 16) Pseudo Static RAM
Maker Cypress Semiconductor
Total Page 10 Pages
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