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Cypress Semiconductor Electronic Components Datasheet

CYII4SM014KAA-GEC Datasheet

14Megapixel CMOS Image Sensor

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CYII4SM014KAA-GEC pdf
CYII4SC014KAA-GTC
CYII4SM014KAA-GEC
IBIS4-14000 14Megapixel CMOS Image Sensor
Table 1. Key Performance Parameters
Parameter
Active Pixels
Pixel Size
Optical format
Shutter Type
Master Clock
Frame rate
Sensitivity (@ 650 nm)
Full Well Charge
kTC Noise
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Dynamic Range
Supply Voltage
Power Consumption
Color Filter Array
Packaging
Typical Value
3048 (H) x 4560 (V)
8 µm x 8 µm
35 mm
Rolling Shutter
15 MHz
3 fps at full resolution
1256 V.m2/W.s
65.000 e-
35 e-
223 e-/s
65.4 dB
3.3V
< 176 mW
Mono and RGB
49-pins PGA
Features
The IBIS4-14000 is a CMOS active pixel image sensor that is
comprised of 14 MegaPixels with 3048 x 4560 active pixels on
an 8m pitch. The sensor has a focal plane array of 36 x 24mm2
and operates in rolling shutter mode. At 15 MHz, 3 fps are
achieved at full resolution. On-chip FPN correction is available
The pixel design is based on the high-fill-factor active pixel
sensor technology of Cypress Semiconductor Corporation
(US patent No. 6,225,670 and others). The sensor is available
in a monochrome version and a Bayer (RGB) patterned color
filter array.
This data sheet allows the user to develop a camera system
based on the described timing and interfacing.
Applications
• Digital photography
• Document scanning
• Biometrics
Cypress Semiconductor Corporation
Document #: 38-05709 Rev. *B
• 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Revised January 8, 2007
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Cypress Semiconductor Electronic Components Datasheet

CYII4SM014KAA-GEC Datasheet

14Megapixel CMOS Image Sensor

No Preview Available !

CYII4SM014KAA-GEC pdf
CYII4SC014KAA-GTC
CYII4SM014KAA-GEC
Architecture and Operation
Floor Plan
The basic architecture of the sensor is shown in Figure 1.
Figure 1. Block Diagram of the IBIS4-14000 Image Sensor
pixel array
4560 x 3048 active pixels
CLK_YL
SYNC_YL
SHS
SHR
CLK_X
SYNC_X
Pixel (0,0)
3048 column amplifiers
x-shift register
CLK_YR
SYNC_YR
4 parallel
analog
outputs
The Y shift registers point at a row of the imager array. This
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are
and
2Y
the
second one points at the row to be reset. The second pointer
may lead the first pointer by a specific number of rows. In that
case, the time difference between both pointers is the
integration time. Alternatively, both shift registers can point at
the same row for reset and readout for a faster reset
sequence. When the row is read out, it is also reset in order to
do double sampling for fixed pattern noise reduction.
The pixel array of the IBIS4-14000 consists of 4536 x 3024
active pixels and 24 additional columns and rows, which can
also be addressed (see Figure 2 on page 3). The column
amplifiers read out the pixel information and perform the
double sampling operation. They also multiplex the signals on
the readout buses, which are buffered by the output amplifiers.
The shift registers can be configured for various subsampling
modes. The output amplifiers can be individually powered
down. And some other extra functions are foreseen. These
options are configurable via a serial input port.
Document #: 38-05709 Rev. *B
Page 2 of 27
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Part Number CYII4SM014KAA-GEC
Description 14Megapixel CMOS Image Sensor
Maker Cypress Semiconductor
Total Page 27 Pages
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