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Cypress Semiconductor Electronic Components Datasheet

CYDM128B16 Datasheet

1.8 V 4 K/8 K/16 K x 16 MoBL Dual-Port Static RAM

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CYDM128B16 pdf
CYDM064B16
CYDM128B16
CYDM256B16
1.8 V 4 K/8 K/16 K × 16
MoBL® Dual-Port Static RAM
1.8V 4K/8K/16K x 16 MoBL® Dual-Port Static RAM
Features
True dual ported memory cells that allow simultaneous access
of the same memory location
4, 8, or 16K × 16 organization
Ultra Low operating power
Active: ICC = 15 mA (typical) at 55 ns
Standby: ISB3 = 2 A (typical)
Small footprint: available in a 6x6 mm 100-pin Pb-free vfBGA
Port independent 1.8V, 2.5V, and 3.0V I/Os
Full asynchronous operation
Automatic power down
Pin select for Master or Slave
Expandable data bus to 32-bits with Master or Slave chip select
when using more than one device
On-chip arbitration logic
Semaphores included to permit software handshaking
between ports
Input read registers and output drive registers
INT flag for port-to-port communication
Separate upper-byte and lower-byte control
Industrial temperature ranges
Selection Guide for VCC = 1.8V
Parameter
Port I/O Voltages (P1-P2)
Maximum Access Time
Typical Operating Current
Typical Standby Current for ISB1
Typical Standby Current for ISB3
CYDM256B16, CYDM128B16, CYDM064B16
(-55)
1.8V -1.8V
55
15
2
2
Unit
V
ns
mA
A
A
Selection Guide for VCC = 2.5V
Parameter
Port I/O Voltages (P1-P2)
Maximum Access Time
Typical Operating Current
Typical Standby Current for ISB1
Typical Standby Current for ISB3
CYDM256B16, CYDM128B16, CYDM064B16
(-55)
2.5V-2.5V
55
28
6
4
Unit
V
ns
mA
A
A
Selection Guide for VCC = 3.0V
Parameter
Port I/O Voltages (P1-P2)
Maximum Access Time
Typical Operating Current
Typical Standby Current for ISB1
Typical Standby Current for ISB3
CYDM256B16, CYDM128B16, CYDM064B16
(-55)
3.0V-3.0V
55
42
7
6
Unit
V
ns
mA
A
A
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-00217 Rev. *I
• San Jose, CA 95134-1709 • 408-943-2600
Revised March 10, 2014


Cypress Semiconductor Electronic Components Datasheet

CYDM128B16 Datasheet

1.8 V 4 K/8 K/16 K x 16 MoBL Dual-Port Static RAM

No Preview Available !

CYDM128B16 pdf
Logic Block Diagram [1, 2]
IO[15:0]L
UBL
LBL
IO
Control
CYDM064B16
CYDM128B16
CYDM256B16
IO
Control
IO[15:0]R
UBR
LBR
16K X 16
Dual Ported Array
A[13:0]L
CE L
OE L
R/W L
SEML
BUSY L
INTL
IRR0 ,IRR1
Address Decode
Address Decode
Mailboxes
CEL
OEL
R/WL
Interrupt
Arbitration
Semaphore
INTR
M/S
Input Read
Register and
Output Drive
Register
SFEN
CE R
OE R
R/W R
ODR0 - ODR4
A [13:0]R
CE R
OE R
R/W R
SEMR
BUSY R
Notes
1. A0–A11 for 4K devices; A0–A12 for 8K devices; A0–A13 for 16K devices.
2. BUSY is an output in master mode and an input in slave mode.
Document Number: 001-00217 Rev. *I
Page 2 of 27


Part Number CYDM128B16
Description 1.8 V 4 K/8 K/16 K x 16 MoBL Dual-Port Static RAM
Maker Cypress Semiconductor
Total Page 27 Pages
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