| Description | the memory location specified on the adĆ dress pins (A0 through A10). ReadingthedeviceisaccomplishedbytakĆ ing chip enable (CE) and output enable (OE) LOW while write enable (WE) reĆ mainsHIGH.Undertheseconditions,the contents of the memory location specified on the address pins will appear on the I/O pins. The I/O pins remain in highĆimpedance state when chip enable (CE) is HIGH or write enable ... |
| Features |
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Automatic powerĆdown when deselected CMOS for optimum speed/power High speed Ċ 20 ns Low active power Ċ 550 mW Low standby power Ċ 110 mW TTLĆcompatible inputs and outputs Capable of withstanding greater than 2001V electrostatic discharge
The CY6116A and CY6117A are highĆ performance CMOS static RAMs orgaĆ nized as 2048 words by 8 b...
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| Datasheet |
 CY6117A Datasheet - 466.37KB |
