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Cypress Semiconductor Electronic Components Datasheet

CY2280PVC-21S Datasheet

100-MHz Pentium II Clock Synthesizer/Driver with Spread Spectrum for Mobile or Desktop PCs

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CY2280PVC-21S pdf
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CY2280
100-MHz Pentium® II Clock Synthesizer/Driver with
Spread Spectrum for Mobile or Desktop PCs
Features
• Mixed 2.5V and 3.3V operation
• Clock solution for Pentium® II, and other similar pro-
cessor-based motherboards
— Four 2.5V CPU clocks up to 100 MHz
— Eight 3.3V sync. PCI clocks, one free-running
— Two 3.3V 48-MHz USB clocks
— Three 3.3V Ref. clocks at 14.318 MHz
— Two 2.5V APIC clocks at 14.318 MHz or PCI/2
• EMI control
— Spread spectrum clocking
— Factory-EPROM programmable spread spectrum
margin
Factory-EPROM programmable output drive and
slew rate
Factory-EPROM programmable CPU clock frequencies
for custom configurations
Available in space-saving 48-pin SSOP package
Functional Description
The CY2280 is a Spread Spectrum clock synthesizer/driver for
a Pentium II, or other similar processor-based PC requiring
100-MHz support. All of the required system clocks are provid-
ed in a space-saving 48-pin SSOP package. The CY2280 can
be used with the CY231x for a total solution for systems with
SDRAM.
The CY2280 provides the option of spread spectrum clocking
on the CPU and PCI clocks for reduced EMI. A downspread
percentage is introduced when the SEL_SS input is asserted.
The device can be run without spread spectrum when the
SEL_SS input is deasserted. The percentage of spreading is
EPROM-programmable to optimize EMI-reduction.
The CY2280 has power-down, CPU stop, and PCI stop pins
for power management control. The signals are synchronized
on-chip, and ensure glitch-free transitions on the outputs.
When the CPU_STOP input is asserted, the CPU clock out-
puts are driven LOW. When the PCI_STOP input is asserted,
the PCI clock outputs (except the free-running PCI clock) are
driven LOW. When the PWR_DWN pin is asserted, the refer-
ence oscillator and PLLs are shut down, and all outputs are
driven LOW.
CY2280 Selector Guide
Clock Outputs
CPU (66.6, 100 MHz)
PCI (CPU/2, CPU/3)
USB (48 MHz)
APIC (14.318 MHz)
APIC (PCI/2)
Reference (14.318 MHz)
CPU-PCI delay
CPU-APIC delay
Spread Spectrum (Downspread)
1
4
8
2
2
3
1.54.0 ns
N/A
CY2280 Configuration Options
11S
4
8
2
2
3
1.54.0 ns
0.6%
21S
4
8
2
2
3
1.54.0 ns
2.04.5 ns
0.6%
Logic Block Diagram
CPU_STOP
XTALIN
XTALOUT
PWR_DWN
SEL0
SEL1
SEL100
SEL_SS
PCI_STOP
14.318
MHz
OSC.
CPU
PLL
Divider
EPROM
Delay
SYS PLL
-1
-2
STOP
LOGIC
STOP
LOGIC
Pentium is a registered trademark of Intel Corporation.
APIC [0:1]
VDDAPIC
REF [0-2]
VDDREF
CPUCLK [0-3]
VDDCPU
PCICLK_F
VDDPCI
PCI [1-7]
VDDPCI
USBCLK [0:1]
VDDUSB
Cypress Semiconductor Corporation 3901 North First Street San Jose CA 95134 408-943-2600
Document #: 38-07207 Rev. *A
Revised December 08, 2002



Cypress Semiconductor Electronic Components Datasheet

CY2280PVC-21S Datasheet

100-MHz Pentium II Clock Synthesizer/Driver with Spread Spectrum for Mobile or Desktop PCs

No Preview Available !

CY2280PVC-21S pdf
CY2280
Pin Configurations
REF0
REF1
VSS
XTALIN
XTALOUT
VSS
PCICLK_F
PCICLK1
VDDPCI
PCICLK2
PCICLK3
VSS
PCICLK4
PCICLK5
VDDPCI
PCICLK6
PCICLK7
VSS
AVDD
VSS
VDDUSB
USBCLK0
USBCLK1
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48 VDDREF
47 REF2
46 VDDAPIC
45 APIC0
44 APIC1
43 VSS
42 RESERVED
41 VDDCPU
40 CPUCLK0
39 CPUCLK1
38 VSS
37 VDDCPU
36 CPUCLK2
35 CPUCLK3
34 VSS
33 AVDD
32 VSS
31 PCI_STOP
30 CPU_STOP
29 PWR_DWN
28 N/C
27 SEL0
26 SEL1
25 SEL100 CY2280-1
REF0
REF1
VSS
XTALIN
XTALOUT
VSS
PCICLK_F
PCICLK1
VDDPCI
PCICLK2
PCICLK3
VSS
PCICLK4
PCICLK5
VDDPCI
PCICLK6
PCICLK7
VSS
AVDD
VSS
VDDUSB
USBCLK0
USBCLK1
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48 VDDREF
47 REF2
46 VDDAPIC
45 APIC0
44 APIC1
43 VSS
42 RESERVED
41 VDDCPU
40 CPUCLK0
39 CPUCLK1
38 VSS
37 VDDCPU
36 CPUCLK2
35 CPUCLK3
34 VSS
33 AVDD
32 VSS
31 PCI_STOP
30 CPU_STOP
29 PWR_DWN
28 SEL_SS
27 SEL0
26 SEL1
25 SEL100
CY2280-11S
CY2280-21S
Pin Summary
Name
Pins
Description
VDDPCI
VDDUSB
VDDREF
VDDAPIC
VDDCPU
AVDD
VSS
XTALIN[1]
XTALOUT[1]
15, 9
3.3V Digital voltage supply for PCI clocks
21 3.3V Digital voltage supply for USB clocks
48 3.3V Digital voltage supply for REF clocks
46 2.5V Digital voltage supply for APIC clocks
41, 37
2.5V Digital voltage supply for CPU clocks
33, 19
Analog voltage supply, 3.3V
3, 6, 12, 18, 20, 24, 32, 34, 38, 43 Ground
4 Reference crystal input
5 Reference crystal feedback
PCI_STOP
31
Active LOW control input to stop PCI clocks
CPU_STOP
30
Active LOW control input to stop CPU clocks
PWR_DWN
29
Active LOW control input to power down device
SEL_SS
28
Spread spectrum select input (-11S and -21S options)
N/C 28
Spread spectrum select input (-1 option)
SEL0
27
CPU frequency select input, bit 0 (see Function Table)
SEL1
26
CPU frequency select input, bit 1 (see Function Table)
SEL100
25
CPU frequency select input, selects between 100 MHz and 66.6 MHz
(see Function Table)
CPUCLK[0:3] 40, 39, 36, 35
CPU clock outputs
PCICLK[1:7] 8, 10, 11, 13, 14, 16, 17
PCI clock outputs, at one-half or one-third the CPU frequency of 66.6 MHz
or 100 MHz respectively
PCICLK_F
7
Free-running PCI clock output
APIC[0:1]
45, 44
APIC clock outputs
REF[0:2]
1, 2, 47
3.3V Reference clock outputs
USBCLK[0:1] 22, 23
USB clock outputs
RESERVED 42
Reserved
Note:
D1o.cuFmorebnets#t a: c3c8ur-a0c7y,2u0s7e aRpaerva.lle*lA-resonant crystal, CLOAD = 18 pF.
Page 2 of 12



Cypress Semiconductor Electronic Components Datasheet

CY2280PVC-21S Datasheet

100-MHz Pentium II Clock Synthesizer/Driver with Spread Spectrum for Mobile or Desktop PCs

No Preview Available !

CY2280PVC-21S pdf
CY2280
Function Table (-11S Option)
SEL100
0
0
0
0
0
1
1
1
1
1
SEL1
0
0
1
1
1
0
0
1
1
1
SEL0
0
1
0
1
1
0
1
0
1
1
SEL_SS[2]
N/A
N/A
N/A
0 (downspread)
1 (no spread)
N/A
N/A
N/A
0 (downspread)
1 (no spread)
CPU/PCI
Ratio
2
2
2
2
2
3
3
3
3
3
CPUCLK
Hi-Z
Reserved
Reserved
66.66 MHz
66.66 MHz
TCLK/2
Reserved
Reserved
100 MHz
100 MHz
PCICLK_F
PCICLK
Hi-Z
Reserved
Reserved
33.33 MHz
33.33 MHz
TCLK/6
Reserved
Reserved
33.33 MHz
33.33 MHz
REF
Hi-Z
14.318 MHz
14.318 MHz
14.318 MHz
14.318 MHz
TCLK[3]
14.318 MHz
14.318 MHz
14.318 MHz
14.318 MHz
APIC
Hi-Z
14.318 MHz
14.318 MHz
14.318 MHz
14.318 MHz
TCLK[3]
14.318 MHz
14.318 MHz
14.318 MHz
14.318 MHz
Function Table (-21S Option)
SEL100
0
0
0
0
0
1
1
1
1
1
SEL1
0
0
1
1
1
0
0
1
1
1
SEL0
0
1
0
1
1
0
1
0
1
1
SEL_SS[2]
N/A
N/A
N/A
0 (downspread)
1 (no spread)
N/A
N/A
N/A
0 (downspread)
1 (no spread)
CPU/PCI
Ratio
2
2
2
2
2
3
3
3
3
3
CPUCLK
Hi-Z
Reserved
Reserved
66.66 MHz
66.66 MHz
TCLK/2
Reserved
Reserved
100 MHz
100 MHz
PCICLK_F
PCICLK
Hi-Z
Reserved
Reserved
33.33 MHz
33.33 MHz
TCLK/6
Reserved
Reserved
33.33 MHz
33.33 MHz
REF
Hi-Z
14.318 MHz
14.318 MHz
14.318 MHz
14.318 MHz
TCLK[3]
14.318 MHz
14.318 MHz
14.318 MHz
14.318 MHz
APIC
Hi-Z
Reserved
Reserved
16.67 MHz
16.67 MHz
TCLK/12[3]
Reserved
Reserved
16.67 MHz
16.67 MHz
USBCLK
Hi-Z
48 MHz
48 MHz
48 MHz
48 MHz
TCLK/2
48 MHz
48 MHz
48 MHz
48 MHz
USBCLK
Hi-Z
48 MHz
48 MHz
48 MHz
48 MHz
TCLK/2
48 MHz
48 MHz
48 MHz
48 MHz
Actual Clock Frequency Values
Clock Output
CPUCLK
CPUCLK
USBCLK
Target Frequency Actual Frequency
(MHz)
(MHz)
PPM
66.67
66.654
195
100
99.77
2346
48.0
48.008
167
Power Management Logic
CPU_STOP PCI_STOP PWR_DWN
CPUCLK
PCICLK
X X0
Low Low
0 01
Low Low
0 11
Low Running
1 01
Running
Low
1 11
Running
Running
Notes:
2. Target frequency is modulated by percentage shown (max.) when SEL_SS = 0.
3. TCLK supplied on the XTALIN pin in Test Mode.
Other
PCICLK_F Clocks
Low Low
Running Running
Running Running
Running Running
Running Running
Osc. PLLs
Off Off
Running Running
Running Running
Running Running
Running Running
Document #: 38-07207 Rev. *A
Page 3 of 12




Part Number CY2280PVC-21S
Description 100-MHz Pentium II Clock Synthesizer/Driver with Spread Spectrum for Mobile or Desktop PCs
Maker Cypress Semiconductor
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