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Cypress Semiconductor Electronic Components Datasheet

CY22381 Datasheet

Three-PLL General Purpose Flash Programmable Clock Generator

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CY22381 pdf
CY22381
CY223811
Three-PLL General Purpose
Flash Programmable Clock Generator
Three-PLL General Purpose Flash Programmable Clock Generator
Features
Three integrated phase-locked loops
Ultra-wide divide counters (eight-bit Q, eleven-bit P, and
seven-bit post divide)
Improved linear crystal load capacitors
Flash programmability
Field programmability
Low-jitter, high-accuracy outputs
Power-management options (Shutdown, OE, Suspend)
Configurable crystal drive strength
Frequency select option through external LVTTL Input
3.3 V operation
8-pin small outline integrated circuit (SOIC) package
(CY22381)
8-pin SOIC package with NiPdAu lead finish (CY223811)
CyClocks RT™ support
Functional Description
The CY22381 is the next-generation programmable Flash
programmable clock for use in networking, telecommunication,
datacom, and other general-purpose applications. The CY22381
offers up to three configurable outputs in a 8-pin SOIC, running
off a 3.3 V power supply. The on-chip reference oscillator is
designed to run off an 8–30-MHz crystal, or a 1–166-MHz
external clock signal. The CY22381 has a three PLLs driving 3
programmable output clocks. The output clocks are derived from
the PLL or the reference frequency (REF). Output post dividers
are available for either. The CY223811 is the CY22381 with
NiPdAu lead finish.
For a complete list of related documentation, click here.
Logic Block Diagram
XTALIN
XTALOUT
OSC.
CONFIGURATION
FLASH
SHUTDOWN/OE
FS/SUSPEND
PLL1
11-BIT P
8-BIT Q
PLL2
11-BIT P
8-BIT Q
PLL3
11-BIT P
8-BIT Q
4×3
Crosspoint
Switch
Divider
7-BIT
Divider
7-BIT
Divider
7-BIT
CLKC
CLKB
CLKA
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 38-07012 Rev. *K
• San Jose, CA 95134-1709 • 408-943-2600
Revised November 21, 2014



Cypress Semiconductor Electronic Components Datasheet

CY22381 Datasheet

Three-PLL General Purpose Flash Programmable Clock Generator

No Preview Available !

CY22381 pdf
CY22381
CY223811
Contents
Pinouts .............................................................................. 3
Pin Definitions .................................................................. 3
Operation ........................................................................... 3
Configurable PLLs ....................................................... 3
General-Purpose Input ................................................ 3
Crystal Input ................................................................ 3
Crystal Drive Level and Power .................................... 4
Output Configuration ................................................... 4
Power-Saving Features ............................................... 4
Improving Jitter ............................................................ 4
CyClocks RT Software ..................................................... 4
Maximum Ratings ............................................................. 5
Operating Conditions ....................................................... 5
Electrical Characteristics ................................................. 5
Recommended Crystal Specifications ........................... 6
Test Circuit ........................................................................ 6
Switching Characteristics ................................................ 7
Switching Waveforms ...................................................... 8
Ordering Information ........................................................ 9
Possible Configurations ............................................... 9
Ordering Code Definitions ......................................... 10
Package Drawing and Dimensions ............................... 11
Acronyms ........................................................................ 12
Document Conventions ................................................. 12
Units of Measure ....................................................... 12
Document History Page ................................................. 13
Sales, Solutions, and Legal Information ...................... 14
Worldwide Sales and Design Support ....................... 14
Products .................................................................... 14
PSoC® Solutions ...................................................... 14
Cypress Developer Community ................................. 14
Technical Support ..................................................... 14
Document Number: 38-07012 Rev. *K
Page 2 of 14



Cypress Semiconductor Electronic Components Datasheet

CY22381 Datasheet

Three-PLL General Purpose Flash Programmable Clock Generator

No Preview Available !

CY22381 pdf
CY22381
CY223811
Pinouts
Figure 1. 8-pin SOIC pinout
CLKC
GND
XTALIN
XTALOUT
1
2
3
4
8 FS/SUSPEND/OE/SHUTDOWN
7
6
CVDLKD A
5 CLKB
Pin Definitions
Name
Pin Number
Description
CLKC
1 Configurable clock output C
GND
2 Ground
XTALIN
3 Reference crystal input or external reference clock input
XTALOUT
4 Reference crystal feedback (float if XTALIN is driven by external reference clock)
CLKB
5 Configurable clock output B
CLKA
6 Configurable clock output A
VDD 7 Power supply
FS/SUSPEND/
OE/SHUTDOWN
8 General Purpose Input. Can be Frequency Control, Suspend mode control, Output Enable, or
full-chip shutdown.
Operation
The CY22381 is an upgrade to the existing CY2081. The new
device has a wider frequency range, greater flexibility, improved
performance, and incorporates many features that reduce PLL
sensitivity to external system issues.
The device has three PLLs that allow each output to operate at
an independent frequencies. These three PLLs are completely
programmable.
The CY223811 is the CY22381 with NiPdAu lead finish.
Configurable PLLs
PLL1 generates a frequency that is equal to the reference
divided by an eight-bit divider (Q) and multiplied by an 11-bit
divider in the PLL feedback loop (P). The output of PLL1 is sent
to the crosspoint switch. The frequency of PLL1 can optionally
be changed by using the external CMOS general purpose input.
See the following section on “General-Purpose Input” for more
detail.
PLL2 generates a frequency that is equal to the reference
divided by an eight-bit divider (Q) and multiplied by an 11-bit
divider in the PLL feedback loop (P). The output of PLL2 is sent
to the crosspoint switch.
PLL3 generates a frequency that is equal to the reference
divided by an eight-bit divider (Q) and multiplied by an 11-bit
divider in the PLL feedback loop (P). The output of PLL3 is sent
to the cross-point switch.
General-Purpose Input
The CY22381 features an output control pin (pin 8) that can be
programmed to control one of four features.
When programmed as a frequency select (FS), the input can
select between two arbitrarily programmed frequency settings.
The frequency select can change the following; the frequency of
PLL1, the output divider of CLKB, and the output divider of
CLKA. Any divider change as a result of switching the FS input
is guaranteed to be glitch free.
The general-purpose input can simultaneously control the
Suspend feature, turning off a set of PLLs and outputs
determined during programming.
When programmed as an output enable (OE) the input forces all
outputs to be placed in a three-state condition when LOW.
When programmed as a Shutdown, the input forces a full chip
shutdown mode when LOW.
Crystal Input
The input crystal oscillator is an important feature of this device
because of its flexibility and performance features.
The oscillator inverter has programmable drive strength. This
allows for maximum compatibility with crystals from various
manufacturers, processes, performances, and qualities.
The input load capacitors are placed on-die to reduce external
component cost. These capacitors are true parallel-plate
capacitors for ultra-linear performance. These were chosen to
reduce the frequency shift that occurs when non-linear load
capacitance interacts with load, bias, supply, and temperature
changes. Non-linear (FET gate) crystal load capacitors must not
be used for MPEG, communications, or other applications that
are sensitive to absolute frequency requirements
The value of the load capacitors is determined by six bits in a
programmable register. The load capacitance can be set with a
Document Number: 38-07012 Rev. *K
Page 3 of 14




Part Number CY22381
Description Three-PLL General Purpose Flash Programmable Clock Generator
Maker Cypress Semiconductor
Total Page 14 Pages
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