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Cypress Semiconductor Electronic Components Datasheet

CY15B101N Datasheet

1-Mbit (64K x 16) Automotive F-RAM Memory

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CY15B101N pdf
CY15B101N
1-Mbit (64K × 16) Automotive F-RAM Memory
1-Mbit (64K × 16) Automotive F-RAM Memory
Features
1-Mbit ferroelectric random access memory (F-RAM™)
logically organized as 64K × 16
Configurable as 128K × 8 using UB and LB
High-endurance 100 trillion (1014) read/writes
151-year data retention (see the Data Retention and
Endurance table)
NoDelay™ writes
Page-mode operation for 30-ns cycle time
Advanced high-reliability ferroelectric process
SRAM compatible
Industry-standard 64K × 16 SRAM pinout
60-ns access time, 90-ns cycle time
Superior to battery-backed SRAM modules
No battery concerns
Monolithic reliability
True surface-mount solution, no rework steps
Superior for moisture, shock, and vibration
Low power consumption
Active current 7 mA (typ)
Standby current 120 A (typ)
Low-voltage operation: VDD = 2.0 V to 3.6 V
Automotive-A temperature: –40 C to +85 C
Logic Block Diagram
44-pin thin small outline package (TSOP) Type II
Restriction of hazardous substances (RoHS)-compliant
Functional Description
The CY15B101N is a 64K × 16 nonvolatile memory that reads
and writes similar to a standard SRAM. A ferroelectric random
access memory or F-RAM is nonvolatile, which means that data
is retained after power is removed. It provides data retention for
over 151 years while eliminating the reliability concerns,
functional disadvantages, and system design complexities of
battery-backed SRAM (BBSRAM). Fast write-timing and high
write-endurance make the F-RAM superior to other types of
memory.
The CY15B101N operation is similar to that of other RAM
devices, and, therefore, it can be used as a drop-in replacement
for a standard SRAM in a system. Read cycles may be triggered
by CE or simply by changing the address and write cycles may
be triggered by CE or WE. The F-RAM memory is nonvolatile
due to its unique ferroelectric memory process. These features
make the CY15B101N ideal for nonvolatile memory applications
requiring frequent or rapid writes.
The device is available in a 400-mil, 44-pin TSOP-II
surface-mount package. Device specifications are guaranteed
over the Automotive-A temperature range –40 °C to +85 °C.
For a complete list of related resources, click here.
A15-0
A15-2
A1-0
CE
WE
UB, LB
OE
ZZ
Control
Logic
64K x 16 block
F-RAM Array
...
Column Decoder
I/O Latch & Bus Driver
DQ15-0
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-96058 Rev. *D
• San Jose, CA 95134-1709 • 408-943-2600
Revised September 4, 2015



Cypress Semiconductor Electronic Components Datasheet

CY15B101N Datasheet

1-Mbit (64K x 16) Automotive F-RAM Memory

No Preview Available !

CY15B101N pdf
CY15B101N
Contents
Pinout ................................................................................ 3
Pin Definitions .................................................................. 3
Device Operation .............................................................. 4
Memory Operation ....................................................... 4
Read Operation ........................................................... 4
Write Operation ........................................................... 4
Page Mode Operation ................................................. 4
Precharge Operation ................................................... 4
Sleep Mode ................................................................. 5
SRAM Drop-In Replacement ....................................... 5
Endurance ................................................................... 5
Maximum Ratings ............................................................. 6
Operating Range ............................................................... 6
DC Electrical Characteristics .......................................... 6
Data Retention and Endurance ....................................... 7
Capacitance ...................................................................... 7
Thermal Resistance .......................................................... 7
AC Test Conditions .......................................................... 7
AC Switching Characteristics ......................................... 8
SRAM Read Cycle ...................................................... 8
SRAM Write Cycle ....................................................... 9
Power Cycle and Sleep Mode Timing ........................... 13
Functional Truth Table ................................................... 14
Byte Select Truth Table .................................................. 14
Ordering Information ...................................................... 15
Ordering Code Definitions ......................................... 15
Package Diagram ............................................................ 16
Acronyms ........................................................................ 17
Document Conventions ................................................. 17
Units of Measure ....................................................... 17
Document History Page ................................................. 18
Sales, Solutions, and Legal Information ...................... 19
Worldwide Sales and Design Support ....................... 19
Products .................................................................... 19
PSoC® Solutions ...................................................... 19
Cypress Developer Community ................................. 19
Technical Support ..................................................... 19
Document Number: 001-96058 Rev. *D
Page 2 of 19



Cypress Semiconductor Electronic Components Datasheet

CY15B101N Datasheet

1-Mbit (64K x 16) Automotive F-RAM Memory

No Preview Available !

CY15B101N pdf
CY15B101N
Pinout
Figure 1. 44-Pin TSOP II Pinout
A4
A3
A2
A1
A0
CE
DQ0
DQ1
DQ2
DQ3
VDD
VSS
DQ4
DQ5
DQ6
DQ7
WE
VSS
A15
A14
A13
A12
1 44
2 43
3 42
4 41
5 40
6 39
7 38
8 37
9 44-pin TSOP II 36
10 (× 16) 35
11
12 Top View
13 (not to scale)
34
33
32
14 31
15 30
16 29
17 28
18 27
19 26
20 25
21 24
22 23
A5
A6
A7
OE
UB
LB
DQ15
DQ14
DQ13
DQ12
VSS
VDD
DQ11
DQ10
DQ9
DQ8
ZZ
A8
A9
A10
A11
NC
Pin Definitions
Pin Name I/O Type
Description
A0–A15
DQ0–DQ15
WE
Input
Input/Output
Input
Address inputs: The 16 address lines select one of 64K words in the F-RAM array. The lowest two
address lines A1–A0 may be used for page mode read and write operations.
Data I/O Lines: 16-bit bidirectional data bus for accessing the F-RAM array.
Write Enable: A write cycle begins when WE is asserted. The rising edge causes the CY15B101N to
write the data on the DQ bus to the F-RAM array. The falling edge of WE latches a new column address
for page mode write cycles.
CE Input Chip Enable: The device is selected and a new memory access begins on the falling edge of CE. The
entire address is latched internally at this point. Subsequent changes to the A1–A0 address inputs allow
page mode operation.
OE Input Output Enable: When OE is LOW, the CY15B101N drives the data bus when the valid read data is
available. Deasserting OE HIGH tristates the DQ pins.
UB
Input
Upper Byte Select: Enables DQ15–DQ8 pins during reads and writes. These pins are HI-Z if UB is HIGH.
If the user does not perform byte writes and the device is not configured as a 128K × 8, the UB and LB
pins may be tied to ground.
LB
Input
Lower Byte Select: Enables DQ7–DQ0 pins during reads and writes. These pins are HI-Z if LB is HIGH.
If the user does not perform byte writes and the device is not configured as a 128 K × 8, the UB and LB
pins may be tied to ground.
ZZ Input Sleep: When ZZ is LOW, the device enters a low-power sleep mode for the lowest supply current
condition. ZZ must be HIGH for a normal read/write operation. This pin must be tied to VDD if not used.
VSS Ground Ground for the device. Must be connected to the ground of the system.
VDD Power supply Power supply input to the device.
NC No connect No connect. This pin is not connected to the die.
Document Number: 001-96058 Rev. *D
Page 3 of 19




Part Number CY15B101N
Description 1-Mbit (64K x 16) Automotive F-RAM Memory
Maker Cypress Semiconductor
Total Page 19 Pages
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