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Cypress Semiconductor Electronic Components Datasheet

CY14B512Q2 Datasheet

512-Kbit (64 K X 8) Serial (SPI) nvSRAM

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CY14B512Q2 pdf
CY14B512Q1
CY14B512Q2
CY14B512Q3
512-Kbit (64 K × 8) Serial (SPI) nvSRAM
Features512-Kbit (64 K × 8) Serial (SPI) nvSRAM
512-Kbit nonvolatile static random access memory (nvSRAM)
Internally organized as 64 K × 8
STORE to QuantumTrap nonvolatile elements initiated
automatically on power-down (AutoStore) or by user using
HSB pin (Hardware STORE) or SPI instruction (Software
STORE)
RECALL to SRAM initiated on power-up (Power-Up
RECALL) or by SPI instruction (Software RECALL)
Automatic STORE on power-down with a small capacitor
(except for CY14B512Q1)
High reliability
Infinite read, write, and RECALL cycles
1 million STORE cycles to QuantumTrap
Data retention: 20 years
High speed serial peripheral interface (SPI)
40 MHz clock rate
Supports SPI mode 0 (0,0) and mode 3 (1,1)
Write protection
Hardware protection using Write Protect (WP) pin
Software protection using Write Disable instruction
Software block protection for 1/4,1/2, or entire array
Low power consumption
Single 3 V +20%, –10% operation
Average active current of 10 mA at 40 MHz operation
Industry standard configurations
Industrial temperature
CY14B512Q1 has identical pin configuration to industry
standard 8-pin NV memory
8-pin dual flat no-lead (DFN) package and 16-pin small
outline integrated circuit (SOIC) package
Restriction of hazardous substances (RoHS) compliant
Functional Overview
The Cypress CY14B512Q1/CY14B512Q2/CY14B512Q3
combines a 512-Kbit nvSRAM[1] with a nonvolatile element in
each memory cell with serial SPI interface. The memory is
organized as 64 K words of 8 bits each. The embedded
nonvolatile elements incorporate the QuantumTrap technology,
creating the world’s most reliable nonvolatile memory. The
SRAM provides infinite read and write cycles, while the
QuantumTrap cell provides highly reliable nonvolatile storage of
data. Data transfers from SRAM to the nonvolatile elements
(STORE operation) takes place automatically at power-down
(except for CY14B512Q1). On power-up, data is restored to the
SRAM from the nonvolatile memory (RECALL operation). The
STORE and RECALL operations can also be initiated by the user
through SPI instruction.
Configuration
Feature
AutoStore
Software
STORE
Hardware
STORE
CY14B512Q1
No
Yes
CY14B512Q2
Yes
Yes
CY14B512Q3
Yes
Yes
No No Yes
Logic Block Diagram
VCC
VCAP
CS
WP
SCK
HOLD
Instruction decode
Write protect
Control logic
QuantumTrap
64 K X 8
SRAM Array
64 K X 8
STORE
RECALL
Power Control
STORE/RECALL
Control
HSB
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SI
Instruction
register
Address
Decoder
A0-A15
D0-D7
Data I/O register
SO
Note
1. This device will be referred to as nvSRAM throughout the document.
Status Register
Cypress Semiconductor Corporation • 198 Champion Court
Document #: 001-53873 Rev. *E
• San Jose, CA 95134-1709 • 408-943-2600
Revised January 12, 2011
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Cypress Semiconductor Electronic Components Datasheet

CY14B512Q2 Datasheet

512-Kbit (64 K X 8) Serial (SPI) nvSRAM

No Preview Available !

CY14B512Q2 pdf
CY14B512Q1
CY14B512Q2
CY14B512Q3
Contents
Pinouts .............................................................................. 3
Device Operation .............................................................. 5
SRAM Write................................................................. 5
SRAM Read ................................................................ 5
STORE Operation ....................................................... 5
AutoStore Operation.................................................... 6
Software STORE Operation ........................................ 6
Hardware STORE and HSB pin Operation ................. 6
RECALL Operation...................................................... 6
Hardware RECALL (Power-Up) .................................. 6
Software RECALL ....................................................... 7
Disabling and Enabling AutoStore............................... 7
Serial Peripheral Interface ............................................... 7
SPI Overview............................................................... 7
SPI Modes................................................................... 8
SPI Operating Features.................................................... 9
Power-Up .................................................................... 9
Power On Reset .......................................................... 9
Power-Down................................................................ 9
Active Power and Standby Power Modes ................... 9
SPI Functional Description.............................................. 9
Status Register ............................................................... 10
Read Status Register (RDSR) Instruction ................. 10
Write Status Register (WRSR) Instruction ................ 10
Write Protection and Block Protection......................... 11
Write Enable (WREN) Instruction.............................. 11
Write Disable (WRDI) Instruction .............................. 11
Block Protection ........................................................ 11
Write Protect (WP) Pin .............................................. 12
Memory Access .............................................................. 12
Read Sequence (READ) instruction.......................... 12
Write Sequence (WRITE) instruction ........................ 12
Software STORE (STORE) instruction...................... 14
Software RECALL (RECALL) instruction .................. 14
AutoStore Enable (ASENB) Instruction ..................... 14
AutoStore Disable (ASDISB) Instruction ................... 14
HOLD Pin Operation ................................................. 15
Best Practices................................................................. 15
Maximum Ratings........................................................... 16
DC Electrical Characteristics ........................................ 16
Data Retention and Endurance ..................................... 17
Capacitance .................................................................... 17
Thermal Resistance........................................................ 17
AC Test Conditions ........................................................ 17
AC Switching Characteristics ....................................... 18
AutoStore or Power-Up RECALL .................................. 19
Software Controlled STORE and RECALL Cycles ...... 20
Hardware STORE Cycle ................................................. 21
Ordering Information...................................................... 22
Ordering Code Definition........................................... 22
Package Diagrams.......................................................... 23
Acronyms ....................................................................... 25
Document Conventions ................................................. 25
Units of Measure ....................................................... 25
Document History Page ................................................. 26
Sales, Solutions, and Legal Information ...................... 27
Worldwide Sales and Design Support....................... 27
Products .................................................................... 27
PSoC Solutions ......................................................... 27
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Document #: 001-53873 Rev. *E
Page 2 of 27
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Part Number CY14B512Q2
Description 512-Kbit (64 K X 8) Serial (SPI) nvSRAM
Maker Cypress Semiconductor
Total Page 27 Pages
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