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CEG8304 Datasheet Preview

CEG8304 Datasheet

Dual P-Channel Enhancement Mode Field Effect Transistor

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CEG8304 pdf
CEG8304
Dual P-Channel Enhancement Mode Field Effect Transistor
PRELIMINARY
FEATURES
-30V, -3.6A, RDS(ON) = 58m@VGS = -10V.
RDS(ON) = 85m@VGS = -4.5V.
Super High dense cell design for extremely low RDS(ON).
High power and current handing capability.
Lead free product is acquired.
TSSOP-8 for Surface Mount Package.
D1 1
S1 2
S1 3
G1 4
G2
S2
S2
D
TSSOP-8
G1
S1
S1
D
8 D2
7 S2
6 S2
5 G2
ABSOLUTE MAXIMUM RATINGS TA = 25 C unless otherwise noted
Parameter
Symbol
Limit
Drain-Source Voltage
Gate-Source Voltage
VDS -30
VGS ±20
Drain Current-Continuous
Drain Current-Pulsed a
ID -3.6
IDM -14
Maximum Power Dissipation
PD 1.25
Operating and Store Temperature Range
TJ,Tstg
-55 to 150
Thermal Characteristics
Parameter
Thermal Resistance, Junction-to-Ambient b
Symbol
RθJA
Limit
100
Units
V
V
A
A
W
C
Units
C/W
This is preliminary information on a new product in development now .
Details are subject to change without notice .
1
Rev 1. 2008.June
http://www.cetsemi.com



CET
CET

CEG8304 Datasheet Preview

CEG8304 Datasheet

Dual P-Channel Enhancement Mode Field Effect Transistor

No Preview Available !

CEG8304 pdf
CEG8304
Electrical Characteristics TA = 25 C unless otherwise noted
Parameter
Symbol
Test Condition
Min Typ Max Units
Off Characteristics
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate Body Leakage Current, Forward
Gate Body Leakage Current, Reverse
On Characteristics c
BVDSS
IDSS
IGSSF
IGSSR
VGS = 0V, ID = -250µA
VDS = -30V, VGS = 0V
VGS = 20V, VDS = 0V
VGS = -20V, VDS = 0V
-30
-1
100
-100
V
µA
nA
nA
Gate Threshold Voltage
Static Drain-Source
On-Resistance
Forward Transconductance
Dynamic Characteristics d
VGS(th)
RDS(on)
gFS
VGS = VDS, ID = -250µA
VGS = -10V, ID = -3.6A
VGS = -4.5V, ID = -2.8A
VDS = -15V, ID = -3.6A
-1
-3 V
48 58 m
64 85 m
8S
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics d
Ciss
Coss
Crss
VDS = -15V, VGS = 0V,
f = 1.0 MHz
550
90
60
pF
pF
pF
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
td(on)
tr
td(off)
VDD = -15V, ID = -1A,
VGS = -10V, RGEN = 6
Turn-Off Fall Time
tf
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Qg
Qgs
VDS = -15V, ID = -3.6A,
VGS = -10V
Qgd
Drain-Source Diode Characteristics and Maximun Ratings
12 24 ns
3 6 ns
22 44 ns
4 8 ns
10 13 nC
3.3 nC
1.8 nC
Drain-Source Diode Forward Current b
Drain-Source Diode Forward Voltage c
IS
VSD
VGS = 0V, IS = -3.6A
-3.6 A
-1.3 V
Notes :
a.Repetitive Rating : Pulse width limited by maximum junction temperature.
b.Surface Mounted on FR4 Board, t < 10 sec.
c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%.
d.Guaranteed by design, not subject to production testing.
2


Part Number CEG8304
Description Dual P-Channel Enhancement Mode Field Effect Transistor
Maker CET
Total Page 4 Pages
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