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Analog Devices Semiconductor Electronic Components Datasheet

AD5686 Datasheet

(AD5684 / AD5686) 16-/12-Bit nanoDAC

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AD5686 pdf
Data Sheet
Quad, 16-/12-Bit nanoDAC+
with SPI Interface
AD5686/AD5684
FEATURES
High relative accuracy (INL): ±2 LSB maximum @ 16 bits
Tiny package: 3 mm × 3 mm, 16-lead LFCSP
Total unadjusted error (TUE): ±0.1% of FSR maximum
Offset error: ±1.5 mV maximum
Gain error: ±0.1% of FSR maximum
High drive capability: 20 mA, 0.5 V from supply rails
User selectable gain of 1 or 2 (GAIN pin)
Reset to zero scale or midscale (RSTSEL pin)
1.8 V logic compatibility
50 MHz SPI with readback or daisy chain
Low glitch: 0.5 nV-sec
Robust 4 kV HBM and 1.5 kV FICDM ESD rating
Low power: 1.8 mW at 3 V
2.7 V to 5.5 V power supply
−40°C to +105°C temperature range
APPLICATIONS
Digital gain and offset adjustment
Programmable attenuators
Process control (PLC I/O cards)
Industrial automation
Data acquisition systems
GENERAL DESCRIPTION
The AD5686/AD5684, members of the nanoDAC+™ family, are
low power, quad, 16-/12-bit buffered voltage output DACs.
The devices include a gain select pin giving a full-scale output
of 2.5 V (gain = 1) or 5 V (gain = 2). All devices operate from
a single 2.7 V to 5.5 V supply, are guaranteed monotonic by
design, and exhibit less than 0.1% FSR gain error and 1.5 mV
offset error performance. The devices are available in a 3 mm
× 3 mm LFCSP and a TSSOP package.
The AD5686/AD5684 also incorporate a power-on reset circuit
and a RSTSEL pin that ensures that the DAC outputs power up
to zero scale or midscale and remain at that level until a valid
write takes place. Each part contains a per-channel power-down
feature that reduces the current consumption of the device to
4 μA at 3 V while in power-down mode.
The AD5686/AD5684 employ a versatile SPI interface that
operates at clock rates up to 50 MHz, and all devices contain
a VLOGIC pin intended for 1.8 V/3 V/5 V logic.
FUNCTIONAL BLOCK DIAGRAM
VLOGIC
SCLK
SYNC
SDIN
SDO
VDD GND
AD5686/AD5684
VREF
INPUT
REGISTER
DAC
STRING
REGISTER DAC A
INPUT
REGISTER
DAC
STRING
REGISTER DAC B
INPUT
REGISTER
DAC
STRING
REGISTER DAC C
INPUT
REGISTER
DAC
STRING
REGISTER DAC D
POWER-ON
RESET
GAIN
×1/×2
LDAC RESET
RSTSEL
Figure 1.
GAIN
BUFFER
VOUTA
BUFFER
VOUTB
BUFFER
VOUTC
BUFFER
POWER-
DOWN
LOGIC
VOUTD
www.DataSheet.net/
Table 1. Quad nanoDAC+ Devices
Interface Reference 16-Bit
SPI Internal AD5686R
SPI External AD5686
I2C Internal AD5696R
I2C External AD5696
14-Bit
AD5685R
AD5695R
12-Bit
AD5684R
AD5684
AD5694R
AD5694
PRODUCT HIGHLIGHTS
1. High Relative Accuracy (INL).
AD5686 (16-bit): ±2 LSB maximum
AD5684 (12-bit): ±1 LSB maximum
2. Excellent DC Performance.
Total unadjusted error: ±0.1% of FSR maximum
Offset error: ±1.5 mV maximum
Gain error: ±0.1% of FSR maximum
3. Two Package Options.
3 mm × 3 mm, 16-lead LFCSP
16-lead TSSOP
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2012 Analog Devices, Inc. All rights reserved.
Datasheet pdf - http://www.DataSheet4U.co.kr/


Analog Devices Semiconductor Electronic Components Datasheet

AD5686 Datasheet

(AD5684 / AD5686) 16-/12-Bit nanoDAC

No Preview Available !

AD5686 pdf
AD5686/AD5684
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
AC Characteristics........................................................................ 5
Timing Characteristics ................................................................ 6
Daisy-Chain and Readback Timing Characteristics................ 7
Absolute Maximum Ratings............................................................ 9
ESD Caution.................................................................................. 9
Pin Configurations and Function Descriptions ......................... 10
Typical Performance Characteristics ........................................... 11
Terminology .................................................................................... 16
Theory of Operation ...................................................................... 18
Digital-to-Analog Converter .................................................... 18
Transfer Function ....................................................................... 18
DAC Architecture....................................................................... 18
REVISION HISTORY
7/12—Revision 0: Initial Version
Data Sheet
Serial Interface ............................................................................ 19
Standalone Operation................................................................ 20
Write and Update Commands.................................................. 20
Daisy-Chain Operation ............................................................. 20
Readback Operation .................................................................. 21
Power-Down Operation ............................................................ 21
Load DAC (Hardware LDAC Pin) ........................................... 22
LDAC Mask Register ................................................................. 22
Hardware Reset (RESET) .......................................................... 23
Reset Select Pin (RSTSEL) ........................................................ 23
Applications Information .............................................................. 24
Microprocessor Interfacing....................................................... 24
AD5686/AD5684 to ADSP-BF531 Interface .......................... 24
AD5686/AD5684 to SPORT Interface .................................... 24
Layout Guidelines....................................................................... 24
Galvanically Isolated Interface ................................................. 25
Outline Dimensions ....................................................................... 26
Ordering Guide .......................................................................... 27
www.DataSheet.net/
Rev. 0 | Page 2 of 28
Datasheet pdf - http://www.DataSheet4U.co.kr/


Part Number AD5686
Description (AD5684 / AD5686) 16-/12-Bit nanoDAC
Maker Analog Devices
Total Page 28 Pages
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