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Analog Devices Semiconductor Electronic Components Datasheet

AD5682R Datasheet

Tiny 16-/14-/12-Bit SPI nanoDAC+

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AD5682R pdf
Data Sheet
Tiny 16-/14-/12-Bit SPI nanoDAC+, with
±2 (16-Bit) LSB INL and 2 ppm/°C Reference
AD5683R/AD5682R/AD5681R/AD5683
FEATURES
Ultrasmall package: 2 mm × 2 mm, 8-lead LFCSP
High relative accuracy (INL): ±2 LSB maximum at 16 bits
AD5683R/AD5682R/AD5681R
Low drift, 2.5 V reference: 2 ppm/°C typical
Selectable span output: 2.5 V or 5 V
AD5683
External reference only
Selectable span output: VREF or 2 × VREF
Total unadjusted error (TUE): 0.06% of FSR maximum
Offset error: ±1.5 mV maximum
Gain error: ±0.05% of FSR maximum
Low glitch: 0.1 nV-sec
High drive capability: 20 mA
Low power: 1.2 mW at 3.3 V
Independent logic supply: 1.8 V logic compatible
Wide operating temperature range: −40°C to +105°C
Robust 4 kV HBM ESD protection
APPLICATIONS
Process controls
Data acquisition systems
Digital gain and offset adjustment
Programmable voltage sources
GENERAL DESCRIPTION
The AD5683R/AD5682R/AD5681R/AD5683, members of the
nanoDAC+® family, are low power, single-channel, 16-/14-/12-bit
buffered voltage out digital-to-analog converters (DACs). The
devices, except the AD5683, include an enabled by default internal
2.5 V reference, offering 2 ppm/°C drift. The output span can be
programmed to be 0 V to VREF or 0 V to 2 × VREF. All devices
operate from a single 2.7 V to 5.5 V supply and are guaranteed
monotonic by design. The devices are available in a 2.00 mm ×
2.00 mm, 8-lead LFCSP or a 10-lead MSOP.
The internal power-on reset circuit ensures that the DAC register
is written to zero scale at power-up while the internal output
buffer is configured in normal mode. The
AD5683R/AD5682R/AD5681R/AD5683 contain a power-down
mode that reduces the current consumption of the device to 2 µA
(maximum) at 5 V and provides software selectable output loads
while in power-down mode.
The AD5683R/AD5682R/AD5681R/AD5683 use a versatile
3-wire serial interface that operates at clock rates of up to 50 MHz.
Some devices also include asynchronous RESET pin and VLOGIC
pin options, allowing 1.8 V compatibility.
Rev. C
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
LDAC
RESET
FUNCTIONAL BLOCK DIAGRAM
VLOGIC*
VREF
VDD
POWER-ON
RESET
DAC
REGISTER
2.5V
REF
REF
16-/14-/12-BIT
DAC
AD5683R/
AD5682R/
AD5681R
OUTPUT
BUFFER
VOUT
INPUT
CONTROL LOGIC
POWER-DOWN
CONTROL LOGIC
RESISTOR
NETWORK
*NOT AVAILABLE IN ALL THE MODELS
SYNC SCLK SDI SDO*
GND
Figure 1. AD5683R/AD5682R/AD5681R MSOP
(For more information, see the Functional Block Diagrams—LFCSP section.)
Table 1. Single-Channel nanoDAC+ Portfolio
Interface Reference 16-Bit
14-Bit
SPI
Internal
AD5683R AD5682R
External
AD5683
I2C
Internal
AD5693R AD5692R
External
AD5693
12-Bit
AD5681R
AD5691R
PRODUCT HIGHLIGHTS
1. High Relative Accuracy (INL).
AD5683R/AD5683 (16-bit): ±2 LSB maximum.
2. Low Drift, 2.5 V On-Chip Reference.
2 ppm/°C typical temperature coefficient.
5 ppm/°C maximum temperature coefficient.
3. Two Package Options.
2.00 mm × 2.00 mm, 8-lead LFCSP.
10-lead MSOP.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2013–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com


Analog Devices Semiconductor Electronic Components Datasheet

AD5682R Datasheet

Tiny 16-/14-/12-Bit SPI nanoDAC+

No Preview Available !

AD5682R pdf
AD5683R/AD5682R/AD5681R/AD5683
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Functional Block Diagrams—LFCSP............................................. 3
Specifications..................................................................................... 4
AC Characteristics........................................................................ 6
Timing Characteristics ................................................................ 6
Absolute Maximum Ratings............................................................ 8
Thermal Resistance ...................................................................... 8
ESD Caution.................................................................................. 8
Pin Configurations and Function Descriptions ........................... 9
Typical Performance Characteristics ........................................... 11
Terminology .................................................................................... 17
Theory of Operation ...................................................................... 19
REVISION HISTORY
3/16—Rev. B to Rev. C
Changes to Features Section............................................................ 1
Changes to Specifications Section .................................................. 4
Changes to Table 2............................................................................ 5
Changes to AC Characteristics Section, Timing Characteristics
Section, and Table 4.......................................................................... 6
Changes to Figure 4.......................................................................... 7
Changes to Table 7............................................................................ 9
Changes to Table 8.......................................................................... 10
Changes to Terminology Section.................................................. 17
Changes to SPI Serial Data Interface Section ............................. 21
10/14—Rev. A to Rev. B
Changes to Table 1............................................................................ 1
Changes to Figure 14...................................................................... 11
Added Recommended Regulator Section ................................... 26
Changes to Ordering Guide .......................................................... 28
Data Sheet
Digital-to-Analog Converter .................................................... 19
Transfer Function....................................................................... 19
DAC Architecture....................................................................... 19
Serial Interface ................................................................................ 21
SPI Serial Data Interface............................................................ 21
Short Write Operation (AD5681R Only)................................ 21
Internal Registers........................................................................ 23
Commands .................................................................................. 23
Hardware LDAC......................................................................... 25
Hardware RESET........................................................................ 25
Thermal Hysteresis .................................................................... 26
Power-Up Sequence ................................................................... 26
Recommended Regulator.......................................................... 26
Layout Guidelines....................................................................... 26
Outline Dimensions ....................................................................... 27
Ordering Guide .......................................................................... 28
1/14—Rev. 0 to Rev. A
Change to Features Section ..............................................................1
Removed Endnote 2, Endnote 3, Endnote 5, and Endnote 6,
Table 2; Renumbered Sequentially..................................................5
Removed Endnote 2, Table 3; Renumbered Sequentially ............6
Removed Endnote 1, Table 4; Renumbered Sequentially ............6
Changes to Table 5.............................................................................8
Removed Solder Heat Reflow Section and Figure 53;
Renumbered Sequentially ............................................................. 25
12/13—Revision 0: Initial Version
Rev. C | Page 2 of 28


Part Number AD5682R
Description Tiny 16-/14-/12-Bit SPI nanoDAC+
Maker Analog Devices
Total Page 28 Pages
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