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Analog Devices Semiconductor Electronic Components Datasheet

AD5533B Datasheet

32-Channel Precision Infinite Sample-and-Hold

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AD5533B pdf
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a
32-Channel Precision
Infinite Sample-and-Hold
FEATURES
Infinite Sample-and-Hold Capability to ؎0.018% Accuracy
Infinite Sample-and-Hold Total Unadjusted Error ؎2.5 m V
High Integration:
32-Channel DAC in 12 mm ؋ 12 mm CSPBGA
Per Channel Acquisition Time of 16 s Max
Adjustable Voltage Output Range
Output Impedance 0.5
Output Voltage Span 10 V
Readback Capability
DSP/Microcontroller Compatible Serial Interface
Parallel Interface
Temperature Range 40؇C to +85؇C
APPLICATIONS
Optical Networks
Automatic Test Equipment
Level Setting
Instrumentation
Industrial Control Systems
Data Acquisition
Low Cost I/O
AD5533B*
GENERAL DESCRIPTION
The AD5533B combines a 32-channel voltage translation function
with an infinite output hold capability. An analog input voltage on
the common input pin, VIN, is sampled and its digital represen-
tation transferred to a chosen DAC register. VOUT for this DAC
is then updated to reflect the new contents of the DAC register.
Channel selection is accomplished via the parallel address inputs
A0–A4 or via the serial input port. The output voltage range is
determined by the offset voltage at the OFFS_IN pin and the gain
of the output amplifier. It is restricted to a range from VSS + 2 V
to VDD – 2 V because of the headroom of the output amplifier.
The device is operated with AVCC = +5 V ± 5%, DVCC = +2.7 V
to +5.25 V, VSS = –4.75 V to –16.5 V, and VDD = +8 V to
+16.5 V and requires a stable 3 V reference on REF_IN as well
as an offset voltage on OFFS_IN.
PRODUCT HIGHLIGHTS
1. Precision infinite droopless sample-and-hold capability.
2. The AD5533B is available in a 74-lead CSPBGA with a
body size of 12 mm ϫ 12 mm.
3. In infinite sample-and-hold mode, a total unadjusted error of
± 2.5 mV is achieved by laser-trimming on-chip resistors.
FUNCTIONAL BLOCK DIAGRAM
DVCC AVCC
REF IN REF OUT OFFS IN
VDD VSS
VIN
TRACK / RESET
BUSY
DAC GND
AGND
DGND
SER / PAR
ADC
DAC
VOUT 0
AD5533B
INTERFACE
CONTROL
LOGIC
SCLK DIN DOUT
DAC
DAC
VOUT 31
OFFS OUT
ADDRESS INPUT REGISTER
WR
SYNC/CS A4 –A0 CAL OFFSET SEL
*Protected by U.S. Patent No. 5,969,657; other patents pending.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002


Analog Devices Semiconductor Electronic Components Datasheet

AD5533B Datasheet

32-Channel Precision Infinite Sample-and-Hold

No Preview Available !

AD5533B pdf
AD5533B–SPECIFICATIONS (VDD = +8 V to +16.5 V, VSS = –4.75 V to –16.5 V; AVCC = +4.75 V to +5.25 V;
DVCC = 2.7 V to 5.25 V; AGND = DGND = DAC_GND = 0 V; REF_IN = 3 V; OFFS_IN = 0 V;
Output Range from VSS + 2 V to VDD – 2 V. All outputs unloaded. All specifications TMIN to TMAX, unless otherwise noted.)
Parameter1
ANALOG CHANNEL
VIN to VOUT Nonlinearity
Total Unadjusted Error (TUE)
Gain
Offset Error
ANALOG INPUT (VIN)
Input Voltage Range
Input Lower Dead Band
Input Upper Dead Band
Input Current
Input Capacitance3
ANALOG INPUT (OFFS_IN)
Input Voltage Range
Input Current
VOLTAGE REFERENCE
REF_IN
Nominal Input Voltage
Input Voltage Range3
Input Current
REF_OUT
Output Voltage
Output Impedance3
Reference Temperature Coefficient3
ANALOG OUTPUTS (VOUT 0–31)
Output Temperature Coefficient3, 4
DC Output Impedance
Output Range
Resistive Load3, 5
Capacitive Load3, 5
Short-Circuit Current3
DC Power Supply Rejection Ratio3
DC Crosstalk3
ANALOG OUTPUT (OFFS_OUT)
Output Temperature Coefficient3, 4
DC Output Impedance3
Output Range
Output Current
Capacitive Load
DIGITAL INPUTS3
Input Current
Input Low Voltage
Input High Voltage
Input Hysteresis (SCLK and CS Only)
Input Capacitance
B Version2
± 0.006
± 0.018
± 2.5
± 12
3.51/3.52/3.53
±1
± 10
0 to 3
70
40
1
20
0/4
1
Unit
% typ
% max
mV typ
mV max
min/typ/max
mV typ
mV max
V
mV max
mV max
µA max
pF typ
V min/max
µA max
Conditions/Comments
Input Range 100 mV to 2.96 V
After Gain and Offset Adjustment
See TPC 6.
See TPC 2.
Nominal Input Range
50 mV typ. Referred to VIN.
See Figure 5.
12 mV typ. Referred to VIN.
See Figure 5.
100 nA typ. VIN acquired on
one channel.
Output Range Restricted from
VSS + 2 V to VDD – 2 V
100 nA typ
3.0
2.85/3.15
1
3
280
60
10
0.5
VSS + 2/VDD – 2
5
100
7
–70
–70
250
10
1.3
50 to REF_IN – 12
10
100
± 10
0.8
0.4
2.4
2.0
200
10
V
V min/max
µA max
V typ
ktyp
ppm/°C typ
ppm/°C typ
typ
V min/max
kmin
pF max
mA typ
dB typ
dB typ
µV max
ppm/°C typ
ktyp
mV typ
µA max
pF max
µA max
V max
V max
V min
V min
mV typ
pF max
<1 nA typ
100 µA Output Load
VDD = +15 V ± 5%
VSS = –15 V ± 5%
Outputs Loaded
Source Current
5 µA typ
DVCC = 5 V ± 5%
DVCC = 3 V ± 10%
DVCC = 5 V ± 5%
DVCC = 3 V ± 10%
–2– REV. A


Part Number AD5533B
Description 32-Channel Precision Infinite Sample-and-Hold
Maker Analog Devices
Total Page 16 Pages
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