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Analog Devices Semiconductor Electronic Components Datasheet

AD20MSP410 Datasheet

GSM Baseband Processing Chipset

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AD20MSP410 pdf
a
GSM
Baseband Processing Chipset
FEATURES
Passed European GSM Phase I Type Approval
Complete Baseband Processing Chipset Performs:
Speech Coding/Decoding, According to GSM 06.XX
DTMF and Call Progress Tone Generation
Equalization with 16-State Viterbi, Soft Decision
Channel Coding/Decoding According to GSM 05.03
All ADC and DAC Interface Functions
Includes all Radio, Auxiliary and Voice Interfaces
Support for GSM Data Services
Embedded 16-Bit Microcontroller
Layer 1 Software Provided with Chipset
Full Phase 2 Protocol Stack Software Available
Integrated SIM- and Keyboard Interface
Ultralow Power Design
2.7 V Operating Voltage
Intelligent Power Management Features
Up to 70 Hours Standby Time Achievable
JTAG-Boundary Scan
Full Reference Design Available
Three TQFP Devices, Occupying Less than 12 cm2
APPLICATIONS
GSM/DCS1800 Mobile Radios and PCMCIA Cards
AD20msp410
SYSTEM ARCHITECTURE
ALGORITHM
SIGNAL
PROCESSOR
ASP
PHYSICAL
LAYER
PROCESSOR
AD20msp410
GSM CHIPSET
PLP
µC
BASEBAND
CONVERTER
BBC
RADIO
SUBSYSTEM
512K x 16 128K x 8
ROM
RAM
DISPLAY
2K x 8
EEPROM
KEYPAD
SIM
GENERAL DESCRIPTION
The Analog Devices GSM baseband processing chipset provides
a competitive solution for GSM based mobile radio systems. It
is designed to be fully integrated, easy to use, and compatible
with a wide range of product solutions. GSM phones using this
chipset and its accompanying Layer 1, 2, 3 software have passed
the European GSM full type approval process.
The chipset consists of three highly integrated, sub-micron, low
power CMOS components that form the core baseband signal
processing of the GSM handset. The system architecture is
designed to be easily integrated into current designs and form
the basis of next generation of designs.
The chipset uses an operating voltage of 2.7 V to 3.6 V, which
coupled with the extensive power management features,
significantly reduces the drain on battery power and extends the
handset’s talktime and standby time.
CHIPSET COMPONENTS
Algorithm Signal Processor (ASP)
The ASP is an application specific variant of the ADSP-2171
standard DSP from Analog Devices. It has been optimized to
meet the cost, size and power consumption requirements of
GSM mobile applications. All necessary memory to run the
GSM specific programs is provided on-chip and with its
preprogrammed ROM, no user programming is required. The
ASP implements full rate speech transcoding according to GSM
specifications, including Discontinuous Transmission (DTX)
and Comfort Noise Insertion (CNI). A high performance soft-
decision Viterbi equalizer is also implemented in software,
embedded in the ROM.
Physical Layer Processor (PLP)
The PLP combines application specific hardware and an
embedded 16-bit microcontroller (Hitachi H8/300H) to
perform channel coding and decoding and execute the protocol
stack and user software. The embedded processor executes the
Layer 1, 2, 3 and user MMI software. The PLP can control all
powerdown functions of the other chips and memory support
components to achieve maximum power savings.
Baseband Converter (BBC)
The BBC performs the voiceband and baseband analog-to-
digital and digital-to-analog conversions, interfacing the digital
sections of the chipset to the microphone, loudspeaker and radio
section. In addition, the BBC contains all the auxiliary convert-
ers for burst-ramping, AFC, AGC, battery and temperature
monitoring. The chipset interfaces directly with a variety of
industry standard radio architectures and supplies all the
synthesizer and timing control signals.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
© Analog Devices, Inc., 1996
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703


Analog Devices Semiconductor Electronic Components Datasheet

AD20MSP410 Datasheet

GSM Baseband Processing Chipset

No Preview Available !

AD20MSP410 pdf
AD20msp410
Software
The required Layer 1 software is supplied with the chipset. In
addition, an object code license for Layers 2 and 3 of the
protocol stack is available. This exact package of Layers 1,2,3 of
software, coupled with the AD20msp410 chipset, is today in
phones that have passed European GSM Final Type Approval.
Architecture Overview
A standard GSM Handset can be divided into five functional
areas:
• Analog and Digital Baseband Processing Subsystem
(Voice to Radio)
• Layer 1 Software (Physical Layer)
• Protocol Stack Software (Layers 2 and 3)
• Radio Subsystem
• User Interface Software (MMI)
Analog Devices and The Technology Partnership (TTP)
provide a cost effective and proven method of attaining the
baseband processing subsystem and protocol stack software.
This data sheet includes functional descriptions of the baseband
processing subsystem and the Layer 1 software. The Technol-
ogy Partnership can provide licenses to software and reference
designs in all the other areas of a GSM hand-portable terminal.
For detailed information about the individual chipset compo-
nents, please refer to the ADSP-2178 (ASP), AD7015 (BBC)
and ADPLP01 (PLP) data sheets for electrical characteristics
and timing information.
FUNCTIONAL DESCRIPTION
Figure 1 is a functional block diagram of the GSM baseband
processing chipset. The chipset can be viewed as a functional
block that contains a number of discrete functional units. The
electrical and functional interfaces to the rest of the system are
briefly described at the end of this section and described in
detail in the individual data sheets for each component.
BBC
ASP
VOICE
ADC
SPEECH
ENCODE
CHANNEL INTER- ENCRYPT
ENCODE LEAVE
BASE-
BAND
DAC
VOICE
DAC
SSPPEEEECCHH
EDNECCOODDEE
CHANNEL DEINTER-
DECODE LEAVE DECRYPT
PLP
CONTROL + MMI + I/O
EQUALIZER
BASE-
BAND
ADC
Figure 1. Functional Description
UPLINK
The uplink baseband processing functions include the following
operations:
Analog-to-Digital Voice Conversion (BBC)
A conventional microphone, connected directly to the BBC,
provides an analog input signal to the ADC. The voice ADC
function uses a sigma-delta converter to convert and noise shape
the input signal, achieving a Signal-to-Noise Ratio plus Total
Harmonic Distortion (SNR+THD) of greater than 62.5 dB.
The analog voice signal is sampled at 8 kHz, producing 13-bit
linear values corresponding to the magnitude of the input. The
resulting data is passed to the ASP through a dedicated serial
port.
Speech Encoding (ASP)
The ASP receives the voice data stream from the BBC and
encodes the data from 104 kb/s to 13 kb/s. The algorithm used
is Regular Pulse Excitation, with Long Term Prediction (RPE-
LTP) as specified in the 06-series of GSM recommendations.
The algorithm is tested and proven to be bit-exact against the
GSM test vectors including all VAD/DTX functions. After
encoding the data is transferred to the PLP through a parallel
port in discrete blocks of 260 bits at 20 ms intervals.
Channel Coding (PLP)
The information received from the ASP contains data values
and filter coefficients that have different levels of priority. These
are subsequently protected to different levels within the channel
coding. The encode protection process incorporates block
coding and convolutional encoding. In addition to the normal
speech traffic channels, the channel coding function also
supports data transmission at full rate and half rate. After the
interleave process, if necessary, the data is encrypted using the
required A5/1 or A5/2 encryption algorithm. Data is then
formatted into bursts, with the required timing and training
sequences and sent to the BBC through a dedicated serial port.
GMSK Modulation and D/A Conversion (BBC)
The BBC receives data at 270 kb/s. The on-chip lookup-table
ROM modulates and spectrally shapes the data being sent. A
pair of 10-bit matched differential DACs convert the modulated
data from the digital domain to the analog domain and pass I
and Q data to the transmit section of the radio subsystem.
DOWNLINK
The downlink baseband processing functions include the
following operations:
Analog-to-Digital Conversion (BBC)
The receiver I and Q signals are sampled by a pair of ADCs at
270 kHz. The resulting digital words are transferred to the ASP
through a dedicated receive path serial link and DMA control.
Equalization (ASP)
The equalizer recovers and demodulates the received signal and
establishes local timing and frequency references for the mobile
unit. The equalization algorithm is a version of the Maximum
Likelihood Sequence Estimation (MLSE) using the Viterbi
algorithm. Two confidence bits per symbol provide additional
information about the accuracy of each decision to the channel
codec’s convolutional decoder. The equalizer outputs a
sequence of bits including the confidence bits. This data is
transferred to the PLP through a dedicated parallel port on the
ASP. At this point, the training sequence and trailing bits,
contained within the burst, are discarded.
Channel Decoding (PLP)
The A5/1 or A5/2 decryption algorithm is used, as required, to
recover the data that is ready for the deinterleave process. The
deinterleave process is an exact inversion of the interleave
process used by the transmit section. Data can pass directly to
this function, without the A5/1 or the A5/2 decryption, con-
trolled by the Layer 1 processing. The decode function then
performs convolutional decoding and parity decoding. The
convolutional decoder uses a Viterbi algorithm, with two soft
–2– REV. 0


Part Number AD20MSP410
Description GSM Baseband Processing Chipset
Maker Analog Devices
Total Page 8 Pages
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