| Part Number | IDTCSP2510C |
| Manufacturer | Integrated Device |
| Title | 3.3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER |
| Description | FUNCTIONAL BLOCK DIAGRAM 11 G 3 Y0 4 Y1 5 Y2 8 Y3 9 Y4 15 Y5 16 Y6 17 CLK 24 PLL 13 FBIN 21 AV DD 23 12 FBOUT Y9 20 Y8 Y7 ºC TEMPERATURE RANGE... |
| Features |
• Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications • Distributes one clock input to one bank of ten outputs • Output enable bank control • External feedback (FBIN) pin is used to synchronize the outputs to the clock input signal ... |
| Datasheet |
 IDTCSP2510C Datasheet
|
